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and.v.parsed.txt

// Verilog HDL for "gates.lib", "and_gate" "_functional"
// Module AND gate
module and_gate (a, b, clk, out);

input
	a, b, clk;

output
	out;
reg 
	out;

parameter
	t_hold	= 12,
	t_setup	=  1,
	delay	= 25,

warning_file=3;  // multichannel description of a warning file

reg
	a_internal, b_internal, clk_internal,
	a_state, b_state,          // internal state at inputs a and b
	a_set, b_set;		   // signals determining the moment when
				   // the state of the a,b inputs changes to "1"
integer
	data_delay, 	// delay between a (b) and a_internal (b_internal)
	clk_delay, 	// delay between clk and clk_internal
	out_delay, 	// delay between clk_internal and out
	out_value,	// output value in a given clock cycle
	last_clk_time;	// time when the last clock pulse appeared

initial 
	begin
// define delays between inputs & outputs and the corresponding
//  internal auxiliary registers
	  	if(t_hold<0)
		  begin
	    		data_delay = -t_hold;
	    	  	clk_delay = 0;
		  	out_delay = delay;
		  end
	  	else
		  begin
	    	  	data_delay = 0;
	    	  	clk_delay = t_hold;
		  	out_delay=delay-t_hold;
		  end

// clear internal registers and the output signal
		a_internal = 0;
		b_internal = 0;
		clk_internal = 0;
		last_clk_time = 0;
		a_state = 0;
		b_state = 0;
		a_set = 0;
		b_set = 0;
		out = 0;
	end

always @(posedge a) 	// Execute at positive edge of a
	  a_internal <= #(data_delay) a;

always @(posedge b) 	// Execute at positive edge of b
	  b_internal <= #(data_delay) b;

always @(posedge clk) 	// Execute at positive edge of clk
	  clk_internal <= #(clk_delay) clk;

always @(posedge a_internal)
	begin
// setting an internal state at the input a
                a_state <= a_state | 1'bx;
		if (a_internal === 1)
		  a_set <= #(t_hold+t_setup) 1;

a_internal <= 0;
	end

always @(posedge b_internal)
	begin
// setting an internal state at the input a
                b_state <= b_state | 1'bx;
		if (b_internal === 1)
		  b_set <= #(t_hold+t_setup) 1;

b_internal <= 0;
	end

always @(posedge a_set)
	begin
		if ($stime - last_clk_time >= t_hold+t_setup)
			a_state = 1;
		else
		  begin
			a_state = 1'bx;

// generating a warning
		  	$fwrite(warning_file, 
			 "Violation of hold/setup time in module %m.\n");
			$fwrite(warning_file,
			"Input A pulse at %0d,",
			 $stime-data_delay-t_hold-t_setup);
			$fwrite(warning_file,
			"\tClock pulse at %0d.\n", last_clk_time-clk_delay);
		  end

a_set <= 0;
	end

always @(posedge b_set)
	begin
		if ($stime - last_clk_time >= t_hold+t_setup)
			b_state = 1;
		else
		  begin
			b_state = 1'bx;

// generating a warning
		  	$fwrite(warning_file, 
			 "Violation of hold/setup time in module %m.\n");
			$fwrite(warning_file,
			"Input B pulse at %0d,",
			 $stime-data_delay-t_hold-t_setup);
			$fwrite(warning_file,
			"\tClock pulse at %0d.\n", last_clk_time-clk_delay);
		  end

b_set <= 0;
	end

always @(posedge clk_internal)	
	begin
// computing the output
		if (clk_internal === 1'bx)
		  out_value = 1'bx;
		else
		  out_value = a_state & b_state;

// transfering the result to the output
		out <= #(out_delay) out_value;
		out <= #(out_delay+2) 0;

// clearing the internal state of A and B inputs
		a_state  <= 0;
		b_state  <= 0;

clk_internal <= 0;
		last_clk_time = $stime;
	end

endmodule

[ [ ['module', 'and_gate', '(', [['a'], ['b'], ['clk'], ['out']], ')', ';'],
    [ ['input', 'a', 'b', 'clk', ';'],
      ['output', 'out', ';'],
      ['reg', ['out'], ';'],
      [ 'parameter',
        ['t_hold', '=', '12'],
        ['t_setup', '=', '1'],
        ['delay', '=', '25'],
        ['warning_file', '=', '3'],
        ';'],
      [ 'reg',
        ['a_internal'],
        ['b_internal'],
        ['clk_internal'],
        ['a_state'],
        ['b_state'],
        ['a_set'],
        ['b_set'],
        ';'],
      [ 'integer',
        ['data_delay'],
        ['clk_delay'],
        ['out_delay'],
        ['out_value'],
        ['last_clk_time'],
        ';'],
      [ 'initial',
        [ 'begin',
          [ [ 'if',
              ['(', ['t_hold'], '<', '0', ')'],
              [ 'begin',
                [ [[['data_delay'], '=', '-', ['t_hold']], ';'],
                  [[['clk_delay'], '=', '0'], ';'],
                  [[['out_delay'], '=', ['delay']], ';']],
                'end'],
              'else',
              [ 'begin',
                [ [[['data_delay'], '=', '0'], ';'],
                  [[['clk_delay'], '=', ['t_hold']], ';'],
                  [[['out_delay'], '=', ['delay'], '-', ['t_hold']], ';']],
                'end']],
            [[['a_internal'], '=', '0'], ';'],
            [[['b_internal'], '=', '0'], ';'],
            [[['clk_internal'], '=', '0'], ';'],
            [[['last_clk_time'], '=', '0'], ';'],
            [[['a_state'], '=', '0'], ';'],
            [[['b_state'], '=', '0'], ';'],
            [[['a_set'], '=', '0'], ';'],
            [[['b_set'], '=', '0'], ';'],
            [[['out'], '=', '0'], ';']],
          'end']],
      [ 'always',
        ['@', '(', ['posedge', ['a']], ')'],
        [ [['a_internal'], '<=', ['#', '(', [['data_delay']], ')'], ['a']],
          ';']],
      [ 'always',
        ['@', '(', ['posedge', ['b']], ')'],
        [ [['b_internal'], '<=', ['#', '(', [['data_delay']], ')'], ['b']],
          ';']],
      [ 'always',
        ['@', '(', ['posedge', ['clk']], ')'],
        [ [['clk_internal'], '<=', ['#', '(', [['clk_delay']], ')'], ['clk']],
          ';']],
      [ 'always',
        ['@', '(', ['posedge', ['a_internal']], ')'],
        [ 'begin',
          [ [[['a_state'], '<=', ['a_state'], '|', "1 'b x"], ';'],
            [ 'if',
              ['(', ['a_internal'], '===', '1', ')'],
              [ [ ['a_set'],
                  '<=',
                  ['#', '(', [['t_hold'], '+', ['t_setup']], ')'],
                  '1'],
                ';']],
            [[['a_internal'], '<=', '0'], ';']],
          'end']],
      [ 'always',
        ['@', '(', ['posedge', ['b_internal']], ')'],
        [ 'begin',
          [ [[['b_state'], '<=', ['b_state'], '|', "1 'b x"], ';'],
            [ 'if',
              ['(', ['b_internal'], '===', '1', ')'],
              [ [ ['b_set'],
                  '<=',
                  ['#', '(', [['t_hold'], '+', ['t_setup']], ')'],
                  '1'],
                ';']],
            [[['b_internal'], '<=', '0'], ';']],
          'end']],
      [ 'always',
        ['@', '(', ['posedge', ['a_set']], ')'],
        [ 'begin',
          [ [ 'if',
              [ '(',
                ['$stime'],
                '-',
                ['last_clk_time'],
                '>=',
                ['t_hold'],
                '+',
                ['t_setup'],
                ')'],
              [[['a_state'], '=', '1'], ';'],
              'else',
              [ 'begin',
                [ [[['a_state'], '=', "1 'b x"], ';'],
                  [ '$fwrite',
                    '(',
                    ['warning_file'],
                    '"Violation of hold/setup time in module %m.\\n"',
                    ')',
                    ';'],
                  [ '$fwrite',
                    '(',
                    ['warning_file'],
                    '"Input A pulse at %0d,"',
                    ['$stime'],
                    '-',
                    ['data_delay'],
                    '-',
                    ['t_hold'],
                    '-',
                    ['t_setup'],
                    ')',
                    ';'],
                  [ '$fwrite',
                    '(',
                    ['warning_file'],
                    '"\\tClock pulse at %0d.\\n"',
                    ['last_clk_time'],
                    '-',
                    ['clk_delay'],
                    ')',
                    ';']],
                'end']],
            [[['a_set'], '<=', '0'], ';']],
          'end']],
      [ 'always',
        ['@', '(', ['posedge', ['b_set']], ')'],
        [ 'begin',
          [ [ 'if',
              [ '(',
                ['$stime'],
                '-',
                ['last_clk_time'],
                '>=',
                ['t_hold'],
                '+',
                ['t_setup'],
                ')'],
              [[['b_state'], '=', '1'], ';'],
              'else',
              [ 'begin',
                [ [[['b_state'], '=', "1 'b x"], ';'],
                  [ '$fwrite',
                    '(',
                    ['warning_file'],
                    '"Violation of hold/setup time in module %m.\\n"',
                    ')',
                    ';'],
                  [ '$fwrite',
                    '(',
                    ['warning_file'],
                    '"Input B pulse at %0d,"',
                    ['$stime'],
                    '-',
                    ['data_delay'],
                    '-',
                    ['t_hold'],
                    '-',
                    ['t_setup'],
                    ')',
                    ';'],
                  [ '$fwrite',
                    '(',
                    ['warning_file'],
                    '"\\tClock pulse at %0d.\\n"',
                    ['last_clk_time'],
                    '-',
                    ['clk_delay'],
                    ')',
                    ';']],
                'end']],
            [[['b_set'], '<=', '0'], ';']],
          'end']],
      [ 'always',
        ['@', '(', ['posedge', ['clk_internal']], ')'],
        [ 'begin',
          [ [ 'if',
              ['(', ['clk_internal'], '===', "1 'b x", ')'],
              [[['out_value'], '=', "1 'b x"], ';'],
              'else',
              [[['out_value'], '=', ['a_state'], '&', ['b_state']], ';']],
            [ [['out'], '<=', ['#', '(', [['out_delay']], ')'], ['out_value']],
              ';'],
            [ [['out'], '<=', ['#', '(', [['out_delay'], '+', '2'], ')'], '0'],
              ';'],
            [[['a_state'], '<=', '0'], ';'],
            [[['b_state'], '<=', '0'], ';'],
            [[['clk_internal'], '<=', '0'], ';'],
            [[['last_clk_time'], '=', ['$stime']], ';']],
          'end']]],
    'endmodule']]

Name	Type	Size	Owner/Group	Permission	Last Modified	Actions
.	dir	-	root/root	drwxr-xr-x	2024-07-05 06:23:48
..	dir	-	root/root	drwxr-xr-x	2024-07-05 06:23:48
Ctr3sr.v.parsed.txt	text/plain	988 B	root/root	-rw-r--r--	2020-12-23 06:20:03
TestCtr3sr.v.parsed.txt	text/x-ruby	1.51 KB	root/root	-rw-r--r--	2020-12-23 06:20:04
addacc.v.parsed.txt	text/plain	2.17 KB	root/root	-rw-r--r--	2020-12-23 06:20:16
addacc1_dro.v.parsed.txt	text/plain	9.39 KB	root/root	-rw-r--r--	2020-12-23 06:19:36
addacc1_t1ff.v.parsed.txt	text/plain	13.17 KB	root/root	-rw-r--r--	2020-12-23 06:20:12
addacc_conf.v.parsed.txt	text/plain	8.35 KB	root/root	-rw-r--r--	2020-12-23 06:20:06
addacc_dro.v.parsed.txt	text/plain	9.36 KB	root/root	-rw-r--r--	2020-12-23 06:20:02
addacc_t1ff.v.parsed.txt	text/plain	13.14 KB	root/root	-rw-r--r--	2020-12-23 06:19:27
and.v.parsed.txt	text/plain	9.88 KB	root/root	-rw-r--r--	2020-12-23 06:20:08
and_gate.v.parsed.txt	text/plain	12.5 KB	root/root	-rw-r--r--	2020-12-23 06:20:09
conf.v.parsed.txt	text/plain	7.19 KB	root/root	-rw-r--r--	2020-12-23 06:20:04
core_test.v.parsed.txt	text/plain	8.05 KB	root/root	-rw-r--r--	2020-12-23 06:20:04
count2bit.v.parsed.txt	text/plain	2.46 KB	root/root	-rw-r--r--	2020-12-23 06:19:26
count_all_prims_test.v.parsed.txt	text/plain	2.42 KB	root/root	-rw-r--r--	2020-12-23 06:19:52
count_loads_test.v.parsed.txt	text/plain	9.95 KB	root/root	-rw-r--r--	2020-12-23 06:20:14
dds.v.parsed.txt	text/plain	4.96 KB	root/root	-rw-r--r--	2020-12-23 06:20:10
diff_udp.v.parsed.txt	text/plain	1.09 KB	root/root	-rw-r--r--	2020-12-23 06:20:03
display_all_nets_test.v.parsed.txt	text/plain	3.08 KB	root/root	-rw-r--r--	2020-12-23 06:19:30
div16.v.parsed.txt	text/plain	16.29 KB	root/root	-rw-r--r--	2020-12-23 06:19:53
dro.v.parsed.txt	text/plain	6.67 KB	root/root	-rw-r--r--	2020-12-23 06:19:25
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dro_cell.v.parsed.txt	text/plain	9.27 KB	root/root	-rw-r--r--	2020-12-23 06:19:37
dump_and_fill_mem_test.v.parsed.txt	text/plain	11.71 KB	root/root	-rw-r--r--	2020-12-23 06:19:29
exprinfo_test.v.parsed.txt	text/plain	2.25 KB	root/root	-rw-r--r--	2020-12-23 06:20:00
fetch_values_test.v.parsed.txt	text/plain	1.28 KB	root/root	-rw-r--r--	2020-12-23 06:20:13
ff.v.parsed.txt	text/plain	1.09 KB	root/root	-rw-r--r--	2020-12-23 06:20:01
ff_test.v.parsed.txt	text/plain	2.46 KB	root/root	-rw-r--r--	2020-12-23 06:20:16
fifo.v.parsed.txt	text/plain	18.6 KB	root/root	-rw-r--r--	2020-12-23 06:20:13
framer.v.parsed.txt	text/plain	24.43 KB	root/root	-rw-r--r--	2020-12-23 06:19:43
func_72bit_test.v.parsed.txt	text/plain	1.03 KB	root/root	-rw-r--r--	2020-12-23 06:19:27
gen.v.parsed.txt	text/plain	2.75 KB	root/root	-rw-r--r--	2020-12-23 06:20:11
gencrc.v.parsed.txt	text/plain	22.95 KB	root/root	-rw-r--r--	2020-12-23 06:20:09
hadd.v.parsed.txt	text/plain	21.9 KB	root/root	-rw-r--r--	2020-12-23 06:19:29
hello_test.v.parsed.txt	text/plain	851 B	root/root	-rw-r--r--	2020-12-23 06:19:44
in_port.v.parsed.txt	text/plain	10.08 KB	root/root	-rw-r--r--	2020-12-23 06:20:02
inv.v.parsed.txt	text/plain	6.67 KB	root/root	-rw-r--r--	2020-12-23 06:20:06
inv_cell.v.parsed.txt	text/plain	9.27 KB	root/root	-rw-r--r--	2020-12-23 06:20:05
invoke_commands_test.v.parsed.txt	text/plain	1.08 KB	root/root	-rw-r--r--	2020-12-23 06:20:19
invoke_options_test.v.parsed.txt	text/plain	2.47 KB	root/root	-rw-r--r--	2020-12-23 06:19:51
jtl2.v.parsed.txt	text/plain	831 B	root/root	-rw-r--r--	2020-12-23 06:19:32
list_cells_test.v.parsed.txt	text/plain	8.62 KB	root/root	-rw-r--r--	2020-12-23 06:19:36
list_nets_test.v.parsed.txt	text/plain	2.64 KB	root/root	-rw-r--r--	2020-12-23 06:19:27
list_parameters_test.v.parsed.txt	text/plain	3.11 KB	root/root	-rw-r--r--	2020-12-23 06:19:29
list_path_delays_test.v.parsed.txt	text/plain	3.19 KB	root/root	-rw-r--r--	2020-12-23 06:19:38
list_pathout_ports_test.v.parsed.txt	text/plain	3.12 KB	root/root	-rw-r--r--	2020-12-23 06:19:27
list_prim_delays_test.v.parsed.txt	text/plain	3.01 KB	root/root	-rw-r--r--	2020-12-23 06:20:11
load_in.v.parsed.txt	text/plain	312 B	root/root	-rw-r--r--	2020-12-23 06:20:10
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mem_arb.v.parsed.txt	text/plain	8.6 KB	root/root	-rw-r--r--	2020-12-23 06:19:39
mipd_delays_test.v.parsed.txt	text/plain	2.85 KB	root/root	-rw-r--r--	2020-12-23 06:20:07
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my_monitor_test.v.parsed.txt	text/plain	2.47 KB	root/root	-rw-r--r--	2020-12-23 06:20:16
my_strobe_test.v.parsed.txt	text/plain	5.75 KB	root/root	-rw-r--r--	2020-12-23 06:20:15
myram64x16.v.parsed.txt	text/plain	1.49 KB	root/root	-rw-r--r--	2020-12-23 06:20:19
nco.v.parsed.txt	text/plain	14.78 KB	root/root	-rw-r--r--	2020-12-23 06:20:00
ndro.v.parsed.txt	text/plain	8.86 KB	root/root	-rw-r--r--	2020-12-23 06:20:13
nodeinfo_test.v.parsed.txt	text/plain	4.7 KB	root/root	-rw-r--r--	2020-12-23 06:19:43
onehot.v.parsed.txt	text/plain	13.2 KB	root/root	-rw-r--r--	2020-12-23 06:19:39
or.v.parsed.txt	text/plain	9.87 KB	root/root	-rw-r--r--	2020-12-23 06:19:32
out_port.v.parsed.txt	text/plain	8.9 KB	root/root	-rw-r--r--	2020-12-23 06:19:31
pic.v.parsed.txt	text/plain	239.41 KB	root/root	-rw-r--r--	2020-12-23 06:19:51
pipe1.v.parsed.txt	text/plain	12 KB	root/root	-rw-r--r--	2020-12-23 06:20:15
pipe2.v.parsed.txt	text/plain	40.68 KB	root/root	-rw-r--r--	2020-12-23 06:19:59
pl.v.parsed.txt	text/plain	30.02 KB	root/root	-rw-r--r--	2020-12-23 06:19:57
port_info_test.v.parsed.txt	text/plain	2.03 KB	root/root	-rw-r--r--	2020-12-23 06:20:11
pow_test.v.parsed.txt	text/plain	2.2 KB	root/root	-rw-r--r--	2020-12-23 06:20:10
primitives.v.parsed.txt	text/plain	4.78 KB	root/root	-rw-r--r--	2020-12-23 06:19:52
propagatep_test.v.parsed.txt	text/plain	3.29 KB	root/root	-rw-r--r--	2020-12-23 06:19:25
psr1.v.parsed.txt	text/plain	1.63 KB	root/root	-rw-r--r--	2020-12-23 06:20:16
psr1_conf.v.parsed.txt	text/plain	8.33 KB	root/root	-rw-r--r--	2020-12-23 06:20:16
psr1_dro.v.parsed.txt	text/plain	9.32 KB	root/root	-rw-r--r--	2020-12-23 06:20:18
psr1_split.v.parsed.txt	text/plain	2.44 KB	root/root	-rw-r--r--	2020-12-23 06:19:35
psr2.v.parsed.txt	text/plain	1.29 KB	root/root	-rw-r--r--	2020-12-23 06:20:17
psr2_and.v.parsed.txt	text/plain	12.55 KB	root/root	-rw-r--r--	2020-12-23 06:20:02
psr2_split.v.parsed.txt	text/plain	2.44 KB	root/root	-rw-r--r--	2020-12-23 06:20:04
read_4state_value_test.v.parsed.txt	text/plain	2.33 KB	root/root	-rw-r--r--	2020-12-23 06:19:25
read_attribute_test.v.parsed.txt	text/plain	2.55 KB	root/root	-rw-r--r--	2020-12-23 06:20:08
read_delays_test.v.parsed.txt	text/plain	2.41 KB	root/root	-rw-r--r--	2020-12-23 06:19:29
read_stimulus_short_test.v.parsed.txt	text/plain	4.63 KB	root/root	-rw-r--r--	2020-12-23 06:20:19
read_stimulus_test.v.parsed.txt	text/plain	4.76 KB	root/root	-rw-r--r--	2020-12-23 06:19:51
read_strengthval_test.v.parsed.txt	text/plain	2.35 KB	root/root	-rw-r--r--	2020-12-23 06:20:10
read_test_vector_test.v.parsed.txt	text/plain	2.07 KB	root/root	-rw-r--r--	2020-12-23 06:19:52
read_timeval_test.v.parsed.txt	text/plain	1.17 KB	root/root	-rw-r--r--	2020-12-23 06:20:15
read_vector_test.v.parsed.txt	text/plain	2.07 KB	root/root	-rw-r--r--	2020-12-23 06:19:44
read_vecval_test.v.parsed.txt	text/plain	1.34 KB	root/root	-rw-r--r--	2020-12-23 06:19:38
realpow_test.v.parsed.txt	text/plain	2.07 KB	root/root	-rw-r--r--	2020-12-23 06:20:06
rf.v.parsed.txt	text/plain	97.67 KB	root/root	-rw-r--r--	2020-12-23 06:19:56
sci_alu_comb_calltf_shell.v.parsed.txt	text/plain	2.75 KB	root/root	-rw-r--r--	2020-12-23 06:19:36
sci_alu_comb_calltf_test.v.parsed.txt	text/plain	3.2 KB	root/root	-rw-r--r--	2020-12-23 06:19:26
sci_alu_comb_misctf_shell.v.parsed.txt	text/plain	2.63 KB	root/root	-rw-r--r--	2020-12-23 06:19:56
sci_alu_comb_misctf_test.v.parsed.txt	text/plain	3.2 KB	root/root	-rw-r--r--	2020-12-23 06:19:52
sci_alu_combinational_shell.v.parsed.txt	text/plain	2.63 KB	root/root	-rw-r--r--	2020-12-23 06:19:27
sci_alu_combinational_test.v.parsed.txt	text/plain	3.2 KB	root/root	-rw-r--r--	2020-12-23 06:20:10
sci_alu_latched_shell.v.parsed.txt	text/plain	2.73 KB	root/root	-rw-r--r--	2020-12-23 06:19:32
sci_alu_latched_test.v.parsed.txt	text/plain	4.29 KB	root/root	-rw-r--r--	2020-12-23 06:20:04
sci_alu_sequential_shell.v.parsed.txt	text/plain	2.73 KB	root/root	-rw-r--r--	2020-12-23 06:20:05
sci_alu_sequential_test.v.parsed.txt	text/plain	3.45 KB	root/root	-rw-r--r--	2020-12-23 06:19:39
sci_alu_synchronized_shell.v.parsed.txt	text/plain	2.63 KB	root/root	-rw-r--r--	2020-12-23 06:19:52
sci_alu_synchronized_test.v.parsed.txt	text/plain	3.92 KB	root/root	-rw-r--r--	2020-12-23 06:19:25
sci_alu_with_delays_shell.v.parsed.txt	text/plain	5.67 KB	root/root	-rw-r--r--	2020-12-23 06:20:14
sci_alu_with_delays_test.v.parsed.txt	text/plain	3.2 KB	root/root	-rw-r--r--	2020-12-23 06:20:16
set_mipd_delays_test.v.parsed.txt	text/plain	2.77 KB	root/root	-rw-r--r--	2020-12-23 06:20:01
show_all_nets_test.v.parsed.txt	text/plain	2.62 KB	root/root	-rw-r--r--	2020-12-23 06:19:38
show_all_signals1_test.v.parsed.txt	text/plain	2.47 KB	root/root	-rw-r--r--	2020-12-23 06:19:38
show_all_signals2_test.v.parsed.txt	text/plain	2.54 KB	root/root	-rw-r--r--	2020-12-23 06:20:02
show_all_signals3_test.v.parsed.txt	text/plain	2.47 KB	root/root	-rw-r--r--	2020-12-23 06:20:08
show_all_signals_1_test.v.parsed.txt	text/plain	3.03 KB	root/root	-rw-r--r--	2020-12-23 06:19:38
show_all_signals_2_test.v.parsed.txt	text/plain	2.62 KB	root/root	-rw-r--r--	2020-12-23 06:20:05
show_all_signals_3_test.v.parsed.txt	text/plain	2.49 KB	root/root	-rw-r--r--	2020-12-23 06:20:08
show_value_test.v.parsed.txt	text/plain	2.73 KB	root/root	-rw-r--r--	2020-12-23 06:19:25
sig_gen.v.parsed.txt	text/plain	1.09 KB	root/root	-rw-r--r--	2020-12-23 06:19:52
simple_core.v.parsed.txt	text/plain	8.97 KB	root/root	-rw-r--r--	2020-12-23 06:20:11
splitter.v.parsed.txt	text/plain	1.17 KB	root/root	-rw-r--r--	2020-12-23 06:20:17
sqrt32.v.parsed.txt	text/plain	58.79 KB	root/root	-rw-r--r--	2020-12-23 06:19:42
sqrt8m.v.parsed.txt	text/x-ruby	12.36 KB	root/root	-rw-r--r--	2020-12-23 06:19:44
sr_nv_ctf.v.parsed.txt	text/plain	7.27 KB	root/root	-rw-r--r--	2020-12-23 06:20:00
srcnt.v.parsed.txt	text/plain	7.4 KB	root/root	-rw-r--r--	2020-12-23 06:19:26
string.v.parsed.txt	text/plain	3.65 KB	root/root	-rw-r--r--	2020-12-23 06:19:36
t1ff.v.parsed.txt	text/plain	10.4 KB	root/root	-rw-r--r--	2020-12-23 06:19:59
testcase.v.parsed.txt	text/plain	6.65 KB	root/root	-rw-r--r--	2020-12-23 06:20:06
testcase2.v.parsed.txt	text/csv	12.53 KB	root/root	-rw-r--r--	2020-12-23 06:19:35
testcase3.v.parsed.txt	text/plain	24.41 KB	root/root	-rw-r--r--	2020-12-23 06:19:33
testcase4.v.parsed.txt	text/plain	6.09 KB	root/root	-rw-r--r--	2020-12-23 06:19:31
testcase5.v.parsed.txt	text/plain	2.67 KB	root/root	-rw-r--r--	2020-12-23 06:19:25
tff.v.parsed.txt	text/plain	4.09 KB	root/root	-rw-r--r--	2020-12-23 06:20:14
timescale_info_test.v.parsed.txt	text/plain	2.17 KB	root/root	-rw-r--r--	2020-12-23 06:19:44
usb.v.parsed.txt	text/plain	29.65 KB	root/root	-rw-r--r--	2020-12-23 06:19:37
use_workarea_test.v.parsed.txt	text/plain	1.36 KB	root/root	-rw-r--r--	2020-12-23 06:19:51
utmi_if.v.parsed.txt	text/plain	11.36 KB	root/root	-rw-r--r--	2020-12-23 06:19:51
vpi_utilities_test.v.parsed.txt	text/plain	2.42 KB	root/root	-rw-r--r--	2020-12-23 06:20:12
wb.v.parsed.txt	text/plain	9.14 KB	root/root	-rw-r--r--	2020-12-23 06:20:10
wpulse.v.parsed.txt	text/plain	9.52 KB	root/root	-rw-r--r--	2020-12-23 06:20:17
xor.v.parsed.txt	text/plain	10.44 KB	root/root	-rw-r--r--	2020-12-23 06:20:07
zzzexample.v.parsed.txt	text/plain	24.74 KB	root/root	-rw-r--r--	2020-12-23 06:20:03