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Z@ 8@ ph@ @ @ @ `g(A hA  mA @RA  SA ZA ZB 8B hB pB 0B B `(C XC `gC hC  mC @RC  SC ZC ZD `8D `JhD PGE CE E ZE ZF `8F `JhF PGG CG G ZG [H `8H `JhH PGI CI I ZI  [J `8J `JhJ PGK CK K K [L 8L hL hM `M nM @RM  SM M %[N 8N hN hO `O nO @RO  SO O 1[P 8P hP hQ `Q nQ @RQ  SQ Q =[R 8R hR hS `S nS @RS  SS S I[T 8T hT hU `U nU @RU  SU U U[V 8V hV hW `W nW @RW  SW W a[X 8X Y Y Y Y o[Z 8Z [ [ [ [ }[\ Ќ8\ ] ] ] ] [^ Ќ8^ _ _ _ _ [` Ќ8` a a a a [b Ќ8b c c c c c [d Ќ8d e e e e [f Ќ8f g g g g [h Ќ8h i ]i i i i [j Ќ8j k ]k k k \k  \l m  Sm \m \n o  So \o \p q  Sq \q (\r s  Ss \s 2\t 8t pht t `gt hu ru  mu @Ru  Su \u J\v 8v phv v `gv hw vw mw @Rw  Sw \w Hx 8x phx x x `gx hy vy my @Ry  Sy \y V\z 8z phz z `gz h{ t{  m{ @R{  S{ \{ H| 8| ph| | | `g| h} v} m} @R}  S} \} H~ 8~ ph~ ~ `g~ h v m @R  S \ `\ 8 ph  `gȀ h v m @R  S \ȁ k\ 8 ph  `gȂ h v m @R  S \ȃ v\ 8 ph  Ȅ `g h r  m @R  S \ȅ \ 8 h p 0Ȇ  `( X `g h v m @R  S \ȇ \ 8 ph  `gȈ h t  m @R  S \ȉ \ 8 ph  `gȊ h v m @R  S \ȋ \ 8 ph  Ȍ `g h v m @R  S \ȍ \ 8 ph  `gȎ h v m @R  S \ȏ \ 8 ph  Ȑ `g h v m @R  S \ȑ \ 8 ph  Ȓ `g h t  m @R  S \ȓ ] 8 ph  Ȕ `g h r  m @R  S \ȕ '] 8 ph  `gȖ h v m @R  S \ȗ 1] 8 ph  `gȘ h v m @R  S \ș <] 8 ph  Ț `g h v m @R  S \ț H 8 ph  Ȝ `g h v m @R  S \ȝ R] 8 ph  Ȟ `g h  m @R  S \ȟ 0I 8 ph  Ƞ `g h t  m @R  S \ȡ ]] 8 ph  Ȣ `g h v m @R  S \ȣ h] 8 ph  Ȥ `g h v m @R  S \ȥ t] 8 ph  Ȧ `g h v m @R  S \ȧ ] 8 h p 0Ȩ  `( X `g h v m @R  S \ȩ ] 8 ph  Ȫ `g h v m @R  S \ȫ ] 8 h p 0Ȭ  `( X `g h v m @R  S \ȭ ] 8 ph  Ȯ `g h v m @R  S \ȯ ] 8 ph  Ȱ `g h v m @R  S \ȱ ] 8 `Jh PG C  \ȳ ] 8 `Jh PG C  \ȵ ] 8 `Jh PG C  \ȷ ] 8 `Jh PG C  \ȹ ] 8 `Jh PG C  \Ȼ ] 8 `Jh PG C  \Ƚ ^ 8 `Jh PG C  \ȿ  ^ `8 `Jh PG C  \ ^ `8 `Jh PG C  \ $^ `8 `Jh PG C  \ 2^ `8 `Jh PG C  \ >^ `8 `Jh PG C  \ J^ `8 `Jh PG C  \ X^ `8 `Jh PG C  \ d^ 8 `Jh PG C  \ n^ 8 h p 0  `( X `g h v m @R  S ^ ^ 0b8 h h v m   S ^ ^ 8 h h v m @R  S ^ ^ 0b8 h h v m   S ^ ^ 8 h h v m @R  S ^ ^ 8 h h v m @R  S ^ ^ 8 h h v m @R  S ^ ^ 8 h h r  m @R  S ^ ^ 0b8 h h r  m @R  S ^ ^ 8 h h v m @R  S ^ ^ 8 h h v m @R  S ^ ^ 0b8 h h v m @R  S ^ ^ 8 h h v m @R  S ^ ^ 8 h h v m @R  S ^ _ 8 ph  h pp  m @R  S ^ _ 8 ph  h pp  m @R  S ^ _ 8 ph  h pp  m @R  S ^ _ 8 ph  h pp  m @R  S ^  _ 8 ph  h pp  m @R  S ^ (_ 8 ph  h t `m @R  S ^ 0_ 8 ph  h t `m @R  S ^ 8_ 8 ph  h t `m @R  S ^ @_ 8 ph  h t `m @R  S ^ H_ 8 @h  q @R  S ^ P_ 8 @h  q @R  S ^ X_ 8 @h  q @R  S ^ `_ 8 @h  q @R  S ^ h_ 8 @h  q @R  S ^ p_ 8 h p `     n @R  S ^ |_ 8 h p `     n @R  S ^ _ 8 ph   h   n @R  S ^ _ 8 ph  h   n @R  S ^ _ 8 ph  h   n @R  S ^ _ 8 ph  h   n @R  S ^ _ 8 ph  h   n @R  S ^ _ 8 ph  h   n @R  S ^ _ 8 ph  h   n @R  S ^ _ 8 h p `  h   n @R  S ^ _ 8 h p `  h   n @R  S ^ _ 8 h p `     n @R  S ^ _ 8 h p `  !  ! n! @R!  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EtQIIA։ͅupLd$A)tdD9DLDNLHcÉHD$tH[]A\A]A^A_HH5_119}H[]A\A]A^A_DH1[]A\A]A^A_ff.@AWEAVAUIATUSH8HT$(x 1Ht$L$|$1҉D$At$|$H|$ D$,9D$l$(|$\$9MD$9؉D$N)\$tl\$E1DAEL+d$ AމDAA)D9|$v;A9މDLANBt=LHT$2tH8[]A\A]A^A_Aߋ|$,9|$YH81[]A\A]A^A_fDAVAAUILATUS.HtNI]HLHC$%@-DC LD1HHA+[D]A\A]A^H5211A]{ff.HG(D@Et:f.HHe11H5*^{Hff.USHHdH%(HD$1@H2P$I@t$uMu8t@u@khHT$dH+%(u2H[]@1}HG(HL$E11ҾP++ff.HhdH%(HD$X1H0H(H t{HGHtrHWHtiH 2tH9u HtH9tQooO$oW o_0HD$L$T$(\$8;HT$XdH+%(u)HhfDH;H5jY11y8M*ff.fAUATUSHcHiH(-#dH%(HD$1IL)H\$L,$H& .HHHH?HH)IHiʚ;H)ӐLF)L;,$uH;\$HD$dH+%(u H([]A\A])H=R#Ht1HH9uff.U1H0dH%(HD$(1H|$)1H)H $HT$Ht$H|$HH)H9~6HZ{cIH9~-HD$(dH+%(u6H0L]@}AfDHi@BH)AHLI(f.AWAVAUATUSHdH%(H$1H-H=B1HH9|1E1L=5BL5*HL-gIWfHMtHMHAAL+CH8HsLsL{HkHKMvHL$LH5Z11vHL$MuLH5 [11HL$vHL$H_LH5[11vM?LH5[11evH LH56[11=vAAHT$E1HD$HdH+%(ubHXDA\A]@H5@X1A_81LH51XH1_H5H[]A\A]A^A_ÐSFHt9PDHÅtUt-H5ޡ1zQHCHHt1[fD[fDHK8HS01H5b[DQ@H5A1[1QAVAAUAATIUH>HtvH=HHt"AL$ AT$ A$ED$ HH}DLDuE HH=EHDD]LA\A]A^#1H51PifAUAATIUSHHtvH=\HHt"AL$ AT$ A$ED$ -HH}DLDmE HH=fEHD[L]A\A]1H51Off.AUAATIUSHHtuH=HHt"AL$ AT$ A$ED$ mHH}DLDmE HH=6E.HD[L]A\A]1H5!1Off.AVAUIATAUS4HHLH{HEA HE!D DDHE8u[D]A\A]A^MDEH5N1ALN@տ1H5G5NAff.ATUSHHHàH-hHDeAD%+HHH(H= @ EFHDe u8[]A\u5 G]1A\\M@_fD[1]1H5c=1A\2MfDH5&=1MH-D%dH7HHSPI bulk read failed! %s: addr=0x%lx, val=0x%02x %s: addr=0x%lx, val=0x%04x %s: addr=0x%lx, val=0x%08x %02x BIOS ROM is disabled Failed to read device. Failed to write to device. Unable to contact device. Whitelisted laptop detected. %s: error: %s Serial number is %s succeededfailed 0 1 3>=64busyreadyAccessing byte(s):%s%s%s%s No ROM device found. Access is a %s. Device is %s. devicecontext%s: 0x%02x to 0x%*lx. not ready after write not ready after read %s: 0x%02x from 0x%*lx. %s: write %i, read %i Zero length command! Sending, receivingBBIORaw bitbang mode version %c Bus Pirate shutdown failed. %s: writing %u bytes:WRSR wrote 0x%02x. BYTE PROGRAM size too short! reading %u bytes:No command sent to the chip! 30k115200spispeedserialspeedpullupsoffirate Detected Bus Pirate hardware 0123456789%u.%u ("%s")Detected Bus Pirate firmware HiZ>Using SPI command set v2. SPI speed is %sHz Serial speed is %d baud Raw SPI mode version %c Enabling pull-up resistors. %s: Failed to %s %d bytes Wrote %d bytes: %02x Read %d bytes: disCouldnt initialize libusb! %s, writecnt=%i, readcnt=%i %s: short write %s: short read Found a %s SF100SF200SF%d V:%d.%d.%d resetiCE40Writing %s No filename specified. wbbusparallellpcfwhspi_write_256_chunksizespi_blacklistSPI blacklist is %2x, size %u spi_ignorelistSPI ignorelist is emulateM25P10.RESSST25VF040.REMSSST25VF032BMX25L6436W25Q128FVspi_statusimagematches. Reading %s rbUnable to read %s doesn't match. Requested buses are: %s defaultparallel+lpc+fwh+spiNo MSR initialized. 24MvoltageEmpty voltage= specified. millivGarbage voltage= specified. Setting voltage to %i mV %c%c%dError: %s is an invalid id! Using device %li. targetUsing target %s. Could not initialize libusb! Could not read id. Found dediprog id SF%06d. Using dediprog id SF%06d. Unexpected response to init! Disabling standalone mode. serialnot PCI header type 0x%02x Requested BAR is of type MEMI/O ROM , %sbit, %sprefetchable reservedpciError: %s offsetMissing argument for offset. BROM base=0x%08x Controller not ready. NVIDIAabitmatching %s against %s Bad header checksum. Bad table checksum: %04x. Bad record count: %d. Stuck at 0x%02x. No southbridge found for %s! GCSBIOS_SPI_BCenabled (A16(+) inverted)not enabled%s = 0x%x: Boot BIOS Straps: 0x%x (%s) Top Swap: %s SPI Read Configuration: BIOS_CNTL = 0x%02x: BIOS Lock Enable: %sabled, BIOS Write Enable: %sabled BYT IBASEfwh_idselICH RCRBSPIBAR = 0x%0*lx + 0x%04x BYT RCRBSPI_BASE_ADDRESS = 0x%x BYT SBASESTMicroelectronicsSTLINK-V3DigilentDevelopment board JTAGWinchiphead (WCH)CH341AMicrochipPICkit 2Marvell88SX7042 PCI-e 4-port SATA-IIOpen Graphics ProjectDevelopment Board OGD1IntelSilicon LabsDediprogSF100/SF200/SF600ITE8212F PATA RAIDSilicon ImageSiI 3124 PCI-X SATA CtrlSiI 3132 SATA Raid II CtrlRealtekRTL8139/8139C/8139C+RTL8169SMC1211TX3COM3C90xB: PCI 10BASE-T (TPO)3C90xB: PCI 10BASE-FL3C90xB: PCI 10BASE-FX3C905B: Cyclone 10/100/BNCunknownsystem-manufacturersystem-product-namesystem-versionbaseboard-manufacturerbaseboard-product-namebaseboard-versionAN-M2^AV8 AV8bf6BF6^i440BX-W977 (BM6)$BM6IC7IP35IP35 ProKN8 Ultra^KN9(NF-MCP55 series)$KN9 UltraNF7-SNF-M2 nView(VA6)$VA6vt6x4VT6X4Acorp6A815EPDAGAMIARUMAagamiArumaAlbatronPM266A Proartecgroupdbe61Artec GroupDBE61dbe62DBE62AOpeni945GMx-VFXi965GMt-LAi975Xa-YDG^iMac5,2$AppleiMac5,2^MacBook2,1$MacBook2,1^ConRoeXFire-eSATA2ASRock^Kabini CRB$IMB-A180(-H)^K7S41 $K7S41^K7S41GX$K7S41GXP4i65GV775i65GASUSA7N8X-VM/400A7V600-XA7V8X-MXA7V8X-MX SEA7V8XA7V333A7V8X-XA8AE-LE^A8JA8JmNODUSM3A8M2N-LA (NodusM3-GL8E)NAGAMI2LA8N-LA (Nagami-GL8E)A8N-VM CSM^DSAN-DX$DSAN-DXM2NBP-VM CSMM2V-MX^M6Ne$M6Ne^OPLX-M$OPLX-M^P2B-N$P2B-NP4B266-LMP4B266P4B533-E^GuppyP4GV-LA (Guppy)P4C800-E DeluxeP4P800^P4P800-E$P4P800-E Deluxe^P4P800-VM$P4P800-VM^P4P800-X$P4P800-X^P4P800SE$P4P800SE^P4PE-X/TE$P4PE-X/TEP4SC-EP4SD-LAP4S800-MX^P5A$asusp5aP5A^P5BV-R$P5BV-R^P5GD1 PRO$P5GD1 Pro^P5GD1-VM$P5GD1-VM/SP5GD1(-VM)^P5GD2-Premium$P5GD2 Premium^P5GD2-X$P5GD2-X^P5GDC-V$P5GDC-V Deluxe^P5GDC$P5GDC DeluxeP5GD2/C variants^LITHIUM$P5LP-LE (Lithium-UL8E)^P5LP-LE$P5LP-LE (Epson OEM)^P5LD2$P5LD2^P5LD2-MQ$P5LD2-MQ^P5LD2-VM$P5LD2-VM^P5LD2-VM DH$P5LD2-VM DHP5ND2-SLI Deluxe^P5N-D$P5N-D^P5N-E SLI$P5N-E SLIP5PE-VM^CUSL2-C^TUSL2-C^U38N$U38NBcom/ClientronWinNET P680^KM266-8235$biostarm7viqBiostarM7VIQ^Latitude D630DellOptiPlex GX1PowerEdge 1850^AD77dfiad77DFIElitegroupA928GeForce6100SM-MK7VTA3EPoXEP-8K5A2EP-8NPA7IEP-9NPA7IEP-8RDA3+epoxep-bx3EP-BX3Foxconn6150K8MD-8EKRSH^XY680FujitsuAmilo Xi 3650^6IEM GIGABYTEGA-6IEMGA-7ZM^8IP775/-G$GA-8IP775GA-8IRMLGA-8PE667 Ultra 2^GA-8SIMLFS20$GA-8SIMLFS 2.0^GA-8SIMLH$GA-8SIMLHGA-K8N51GMFGA-K8N51GMF-9GA-K8NSGA-K8N-SLIHPe-Vectra P2706Thpdl145_g3ProLiant DL145 G3dl165_g6ProLiant DL165 G6Puffer2-UL8EVectra VL400^VL420$Vectra VL420 SFFxw9400ibasemb899MB899IBMx3455D201GLY^D945GCNL$D945GCNL^SE440BX-2$SE440BX-2iwilldk8_htxIWILLDK8-HTXkontron986lcd-mKontron986LCD-M^ThinkPad R400IBM/Lenovo^ThinkPad T400^ThinkPad T500^ThinkPad T530^ThinkPad T60ThinkPad T60(s)^ThinkPad W500^ThinkPad X200^ThinkPad X201lenovox220ThinkPad X220^ThinkPad X230^ThinkPad X60ThinkPad X60(s)^Taurinus X200LibiquityMitac6513WU^MSC Vertriebs GmbH$MSCQ7-TCTC^MS-6163 (i440BX)$MSIMS-6163 (MS-6163 Pro)MS-6391 (845 Pro4)^MS-6561MS-6561 (745 Ultra)MS-6577 (Xenon)MS-6590 (KT4 Ultra)^MS-7094$MS-7094 (K8T Neo2-F V2.0)MS-6712 (KT4V)msims6787MS-6787 (P4MAM-V/P4MAM-L)MS-6788-040 (848P NeoV)MS-7005 (651M-L)MS-7025 (K8N Neo2 Platinum)MS-7030 (K8N Neo Platinum)MS-7046MS-7061 (KM4M-V/KM4AM-V)k8n-neo3MS-7135 (K8N Neo3)MS-7207 (K8NGM2-L)MS-7250 (K9N SLI)NokiaIP530^EasyNote LM85$Packard BellEasyNote LM85RV11$RodaLizard RV11SamsungPolaris 32shuttleak31ShuttleAK31AK38NSoyoSY-7VCA^Sun Ultra 40 M2SunTekramP6Pro-A5TermtekTK-3370 (Rev:2.5B)TriGemAnaheim-3TyanS2498 (Tomcat K7M)VIAEPIA EKEPIA M/MII/...EPIA-N/NLMutara V08 [NV2]RIVA 128RIVA TNTRIVA TNT2/TNT2 ProRIVA TNT2 UltraVanta/Vanta LTAladdin TNT2GeForce 256GeForce DDRQuadroGeForce2 MXGeForce2 GOQuadro2 MXRGeForce2 GTS/ProGeForce2 GTSGeForce2 UltraQuadro2 ProGeForce 3 nFXGeForce 3 nFX UltraQuadro 3 DDCDr. KaiserPC-Waechter (Actel FPGA)1M500k250k125k62.5k12M3M2.18M1.5M750k375k23040025000020000002.6MVT6421Ainternaldummynic3comnicrealtekgfxnvidiadrkaisersatasiiataviait8212serprogbuspirate_spidediprogdeveloperboxrayer_spipony_spinicintelnicintel_spinicintel_eepromogp_spisatamvlinux_mtdDevice files /dev/mtd* linux_spiDevice files /dev/spidev*.* pickit2_spich341a_spidigilent_spistlinkv3_spi%s: Mapping %s, 0x%zx bytes at 0x%0*lx %s: Unmapping 0x%zx bytes at %p %s: addr=0x%lx, len=0x%zx, writing data (hex):%s: addr=0x%lx, returning 0xff %s: addr=0x%lx, returning 0xffff %s: addr=0x%lx, returning 0xffffffff ERROR: FDC37B787: Wrong ID 0x%02X. ERROR: GPIO50 mode 0x%02X unexpected. Warning: Flash interface in use by GPIO! ERROR: IT8703F Super I/O not found. ERROR: Failed to read IT8703F Super I/O GPIO Base. Laptop detection overridden by P2 board enable. Reading the USB serialno failed (%s)! %s: %s after %d tries (access=0x%02x, status=0x%02x) ROM device with %s kB attached. %s: Tried to cleanup an invalid PCI context! Please report a bug at flashrom@flashrom.org ERROR: PIIX4 GPO%d not programmed for output. ERROR: Intel PIIX4 PM not found. ERROR: Intel PIIX4 ISA bridge not found. Expected south bridge not found ERROR: SMSC Super I/O not found. ERROR: Super I/O runtime interface not available. ERROR: Intel 82801AA ISA bridge not found. ERROR: AMD SMBus Controller (0x4372) not found. %s: Tried to undo PCI writes without a valid PCI %s! Please report a bug at flashrom@flashrom.org Restoring PCI config space for %02x:%02x:%01x reg 0x%02x ERROR: NVIDIA MCP61 SMBus not found. Can't handle raw bitbang mode version %c! Bus Pirate shutdown completed. %s: addr=0x%lx, len=0x%zx, returning array of 0xff Refusing blacklisted SPI command 0x%02x Ignoring ignorelisted SPI command 0x%02x Forbidden opcode (0x%02x) attempted during AAI sequence! WRSR attempted, but WEL is 0! Max BYTE PROGRAM size exceeded! Initial AAI WORD PROGRAM size too short! Initial AAI WORD PROGRAM size too long! Continuation AAI WORD PROGRAM size too short! Continuation AAI WORD PROGRAM size too long! SECTOR ERASE 0x20 outsize invalid! SECTOR ERASE 0x20 insize invalid! Unaligned SECTOR ERASE 0x20: 0x%x BLOCK ERASE 0x52 outsize invalid! BLOCK ERASE 0x52 insize invalid! Unaligned BLOCK ERASE 0x52: 0x%x BLOCK ERASE 0xd8 outsize invalid! BLOCK ERASE 0xd8 insize invalid! Unaligned BLOCK ERASE 0xd8: 0x%x CHIP ERASE 0x60 outsize invalid! CHIP ERASE 0x60 insize invalid! CHIP ERASE 0xc7 outsize invalid! CHIP ERASE 0xc7 insize invalid! Wrapping the start address around the SFDP table boundary (using 0x%x instead of 0x%x). Crossing the SFDP table boundary in a single continuous chunk produces undefined results after that point. Invalid command sent to flash chip! Bus Pirate communication error! Protocol error while lowering CS#! Protocol error while reading/writing SPI! Protocol error while raising CS#! Protocol error while sending SPI write/read! No serial device given. Use flashrom -p buspirate_spi:dev=/dev/ttyUSB0 Invalid pullups state, not using them. (unknown version number format)Bus Pirate firmware 2.3 and older does not support binary SPI access. Please upgrade to the latest firmware (at least 2.4). Bus Pirate firmware 5.4 and older does not support fast SPI access. Reading/writing a flash chip may take hours. It is recommended to upgrade to firmware 5.5 or newer. Bus Pirate firmware 6.1 and older does not support SPI speeds above 2 MHz. Limiting speed to 2 MHz. It is recommended to upgrade to firmware 6.2 or newer. Bus Pirate v3 or newer detected. Set serial speed to 2M baud. Bus Pirate firmware 5.4 and older does not support custom serial speeds.Using default speed of 115200 baud. Increased serial speeds may not work on older (<3.0) Bus Pirates. Continue at your own risk. Unable to configure system baud rate to specified value.Can't handle raw SPI mode version %c! Protocol error while setting power/CS/AUX(/Pull-up resistors)! Protocol error while setting SPI speed! Pull-ups enabled, so using HiZ pin output! (Open-Drain mode) Protocol error while setting SPI config! Invalid serial speed %s, using default. Invalid SPI speed, using default. Polling read events failed: %i %s! %s: failed to submit OUT transfer: %s %s: failed to submit IN transfer: %s Could not %sable output pins. %s: handle already set! Please report a bug at flashrom@flashrom.org Couldn't open device %04x:%04x. Detaching kernel drivers is not supported. Further accesses may fail. Failed to detach kernel driver: '%s'. Further accesses will probably fail. Failed to claim interface 0: '%s' Failed to get device from device handle. Failed to get device descriptor: '%s' Device revision is %d.%01d.%01d Failed to alloc libusb OUT transfer Failed to alloc libusb IN transfer %d Could not configure stream interface. Command Set LED 0x%x failed (%s)! Unknown voltage %i mV! Aborting. Setting SPI voltage to %u.%03u V Command Set SPI Voltage 0x%x failed! Could not release USB interface! Invalid writecnt=%i, aborting. Invalid readcnt=%i, aborting. Send SPI failed, expected %i, got %i %s! Receive SPI failed, expected %i, got %i %s! Failed to read dediprog id, error %d! Failed to read GPIO pins (%s) %s: Unsupported transfer length of %u blocks! Please report a bug at flashrom@flashrom.org Can't handle 4-byte address with dediprog. Slow read for partial block from 0x%x, length 0x%x %s: Unaligned start=%i, len=%i! Please report a bug at flashrom@flashrom.org Command Read SPI Bulk failed, %i %s! Allocating libusb transfer %i failed: %s! Submitting SPI bulk read %i failed: %s! Failed to issue a command: '%s' Short write issuing a command Failed to get a response: '%s' Short read getting a response Response indicates incorrect length. %s: failed to write data: '%s' %s: failed to read data: '%s' %s: response missing a write count %s: wrote only %d bytes instead of %d %s: response missing a read count %s: read only %d bytes instead of %d %s: Chunk sizes other than 256 bytes are unsupported, chunksize=%u! Please report a bug at flashrom@flashrom.org Command Write SPI Bulk failed, %s! SPI bulk write failed, expected %i, got %s! Page sizes other than 256 bytes are unsupported as we don't know how dediprog handles them. Slow write for partial block from 0x%x, length 0x%x Incomplete/failed Command Receive Device String! Device not a SF100, SF200, or SF600! Unexpected firmware version string '%s' Unexpected firmware version %d.%d.%d! Internal error: Unable to determine protocol version. %s: couldn't initialize libusb! %s: couldn't open device %04x:%04x. %s: failed to claim interface 0: '%s' %s: unknown board '%s' not attempting a reset. Override with '-p digilent_spi=reset=1'. SPI speed set to %d instead of %d Error: Invalid spispeed value: '%s'. Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY). Error: opening file "%s" failed: %s Error: file %s could not be written completely. Error: flushing file "%s" failed: %s Error: getting metadata of file "%s" failed: %s Error: fsyncing file "%s" failed: %s Error: closing file "%s" failed: %s Enabling support for %s flash. Support for all flash bus types disabled. invalid spi_write_256_chunksize Invalid SPI command blacklist length Invalid char "%c" in SPI command blacklist Invalid SPI command ignorelist length Invalid char "%c" in SPI command ignorelist Not emulating any flash chip. Emulating ST M25P10.RES SPI flash chip (RES, page write) Emulating SST SST25VF040.REMS SPI flash chip (REMS, byte write) Emulating SST SST25VF032B SPI flash chip (RDID, AAI write) Emulating Macronix MX25L6436 SPI flash chip (RDID, SFDP) Emulating Winbond W25Q128FV SPI flash chip (RDID) Invalid chip specified for emulation: %s Error: initial status register specified, but the value could not be converted. Initial status register is set to 0x%02x. Filling fake flash chip with 0xff, size %i Found persistent image %s, %jd B Error: Image size (%jd B) doesn't match the flash chip's size (%lu B)! Error: Failed to read complete file. Got %ld bytes, wanted %ld! MCP LPC bridge at unexpected function number %d MCP SMBus controller could not be found Unexpected device class %04x for SMBus controller ERROR: no NVIDIA LPC/SMBus controller found. ERROR: NVIDIA MCP55 LPC bridge not found. Getting the USB device list failed (%s)! Reading the USB device descriptor failed (%s)! Found USB device %04x:%04x at address %d-%d. Opening the USB device at address %d-%d failed (%s)! Could not find a Dediprog programmer on USB. Could not set USB device configuration: %i %s Could not claim USB device interface %i: %i %s Error: Could not parse dediprog 'id'. Expected a string like SF012345 or DP012345. Error: id %s is out of range! Will search for dediprog id %s. Error: Cannot use 'id' and 'device'. Error: Could not convert 'device'. Error: Value for 'device' is out of range. Error: Garbage following 'device' value. Error: Could not convert 'target'. Error: Value for 'target' is out of range. Error: Garbage following 'target' value. FLASH_TYPE_APPLICATION_FLASH_1FLASH_TYPE_APPLICATION_FLASH_2Command Set Voltage failed (%s)! set_target_flash failed (%s)! Skipping to set SPI speed because firmware is too old. Command Set SPI Speed 0x%x failed! Failed to disable standalone mode: %s Looking for serial number commencing %s Could not find a Developerbox programmer on USB. Unknown PCI header type 0x%02x, BAR type cannot be determined reliably. MEM BAR access requested, but device has MEM space accesses disabled. I/O BAR access requested, but device has I/O space accesses disabled. BAR type unknown, please report a bug at flashrom@flashrom.org %s: Tried to allocate a new PCI context, but there is still an old one! Please report a bug at flashrom@flashrom.org === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom@flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Error: No supported PCI device found. Error: Multiple supported PCI devices found. Use 'flashrom -p xxxx:pci=bb:dd.f' to explicitly select the card with the given BDF (PCI bus, device, function). Found "%s %s" (%04x:%04x, BDF %02x:%02x.%x). Error: Invalid offset specified: "%s". Mapping addresses to base %p. Controller thinks there is no ROM attached. Dr. Kaiser PC-Waechter flash memoryDetected NVIDIA I/O base address: 0x%x. Board name "%s":"%s" and PCI IDs matched more than one board enable entry. Please report a bug at flashrom@flashrom.org Odd. Board name "%s":"%s" matches, but second PCI device %04x:%04x doesn't. Odd. Board name "%s":"%s" matches, but first PCI device %04x:%04x doesn't. Warning: Can't autodetect %s %s, DMI info unavailable. Please supply the board vendor and model name with the -p internal:mainboard=: option. Found candidate at: %08lx-%08lx Header bytes of %d are incorrect. Found coreboot table at 0x%08lx. Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY). Found southbridge %04x:%04x at %02x:%02x:%01x BIOS Interface Lock-Down: %sabled, BIOS Prefetch Enable: %sabled, invalid prefetching/caching settings, prefetching %sabled, caching %sabled, Warning: BIOS region SMM protection is enabled! Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed. New value is 0x%02x. Error: Invalid ILB_BASE_ADDRESS Error: fwh_idsel= specified, but (yet) unsupported on this chipset. Error: fwh_idsel= specified, but value could not be converted. Error: fwh_idsel= specified, but value had unused bits set. Setting IDSEL from 0x%012lx to 0x%012lx for top 16 MB. Error: fwh_idsel= specified, but no value given. 0x%08x/0x%08x FWH IDSEL: 0x%x 0x%08x/0x%08x FWH decode %sabled Maximum FWH chip size: 0x%x bytes FWH IDSEL handling is not implemented on this chipset. Root Complex Register Block address = 0x%x 82580 Quad Gigabit Ethernet Controller (Copper)82580 Quad Gigabit Ethernet Controller (Fiber)82580 Quad Gigabit Ethernet Controller (Backplane)82580 Quad Gigabit Ethernet Controller (Ext. PHY)82580 Dual Gigabit Ethernet Controller (Copper)Unprogrammed 82580 Quad/Dual Gigabit Ethernet ControllerI210 Gigabit Network Connection UnprogrammedI211 Gigabit Network Connection UnprogrammedI210 Gigabit Network ConnectionI210 Gigabit Network Connection SERDES FiberI210 Gigabit Network Connection SERDES BackplaneI210 Gigabit Network Connection SGMIII211 Gigabit Network Connection82571EB Gigabit Ethernet Controller82541GI Gigabit Ethernet Controller82541PI Gigabit Ethernet Controller82572EI Gigabit Ethernet Controller82574L Gigabit Ethernet Controller82599 10 Gigabit Unprogrammed Network Controller82599 10 Gigabit KX4 Dual Port Network Controller82599 10 Gigabit Dual Port Backplane Controller82599 10 Gigabit CX4 Dual Port Network Controller82599 10-Gigabit SFI/SFP+ Network Controller82599 10 Gigabit XAUI/BX4 Dual Port Network Controller82599 10 Gigabit KR Network Controller82599 10 Gigabit TN Network Controller82599 10 Gigabit Dual Port Network Controller with FCoE82599 10 Gigabit Dual Port Backplane Controller with FCoE82599 10 Gigabit SFI Network Controller8255xER/82551IT Fast Ethernet Controller82557/8/9/0/1 Ethernet Pro 100CP2102N USB to UART Bridge ControllerPCI0680 Ultra ATA-133 Host CtrlSiI 3112 [SATALink/SATARaid] SATA CtrlSiI 3114 [SATALink/SATARaid] SATA CtrlSiI 3512 [SATALink/SATARaid] SATA Ctrl3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T43C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)3C90xB: PCI 10BASE-T/10BASE2 (TPC)3C905C: EtherLink 10/100 PCI (TX)3C980C: EtherLink Server 10/100 PCI (TX)MS-7125 (K8N Neo4(-F/-FI/-FX/Platinum))RIVA TNT2 Model 64/Model 64 ProDummy device, does nothing and logs all accesses All programmer devices speaking the serprog protocol Dangerous Prototypes Bus Pirate RayeR parallel port programmer Programmers compatible with SI-Prog, serbang or AJAWe Nxa|RQ\R\R\RlRlRlRgQgQLR|RgQLRLRLRLR4RNNN @@ @@NSFDP H k; R6'Odummy_spi_send_commanddummy_chip_readndummy_chip_readldummy_chip_readwdummy_chip_readbdummy_chip_writendummy_chip_writeldummy_chip_writewdummy_chip_writebdummy_unmapdummy_mapdummy_initdummy_shutdowndefault_resetdigilent_spi_initspi_tx_enddigilent_spi_send_commanddediprog_spi_send_command dediprog_spi_bulk_write dediprog_spi_bulk_readprepare_rw_cmdconfig_streamch341a_spi_initch341a_spi_spi_send_commandenable_pinscb_incb_outbuspirate_sendrecvatavia_chip_readbatavia_chip_writebatavia_readyundo_pci_writepci_init_commonpcidev_shutdownHSFS: FDONE%s=%d, FCERRAELBERASESCIPPRR34_LOCKDNWRSDISFDOPSSFDVFLOCKDN%s=%d HSFC: FGOHSFCWETFCYCLEFDBCSMESSFS: SSFC: SCGOACSSPOPCOPSCFs with a combined with a density of %d kB. HSFC used for block erasing: %s failed RDSR failed! Executing... done cmd=%02x mode=%02x data=0x%02x addr=0x%02x data=0x%s: returning data =Unsupported chip size 0x%x Timeout reading heading byte Timeout writing heading word Timeout reading tail byte Timeout writing Shadow RAM Disabling byte merging wbsio_spibase = 0x%x OK IMC SIO is at 0x%x. IMC MBOX is at 0x%x. IMC MBOX: Timeout! Resuming IMC failed) IMC resumed. Elan SC520 MMCRVIA SPI MMIO registers0x00: 0x%04x (SPIS) 0x02: 0x%04x (SPIC) 0x04: 0x%08x (SPIA) 0x%02x: 0x%08x (SPID%d) 0x%02x: 0x%08x (SPID%d+4) 0x50: 0x%08x (BBAR) 0x54: 0x%04x (PREOP) 0x56: 0x%04x (OPTYPE) 0x58: 0x%08x (OPMENU) 0x5c: 0x%08x (OPMENU+4) 0x%02x: 0x%08x (PBR%d) Strapped to LPC. SPI. MMIO not enabled! VIA VX MMIO registerSPI Bus0 disabled! SPI Bus1 is enabled too. reset Filling FIFO: [%02x]Skipping: Reading FIFO: Filling buffer: Reading buffer: IT8212F flash%s/%sCannot open %s Error reading %s Error reading %s: %s Cannot seek to 0x%06x: %s Failed to flush buffer: %s %s: ioctl: %s %s does not exist /sys/class/mtd%s/mtd%d/typenor/dev%s/mtd%dCannot stat "%s": %s flagsMTD size is not a power of 2 erasesizenumeraseregionsr+Opened %s successfully ATIboardenableboardmismatchforce_I_want_a_brickthis_is_not_a_laptopMissing argument for laptop. mainboardlow megabyteNo coreboot table found. high tablesContinuing anyway. Using Internal DMI decoder. DMI_DMI_DMI TableUnable to access DMI Table Not SpecifiedNo DMI table found. Laptop detected via DMI. DMI string %s: "%s" Found chipset "%s %s" with PCI ID %04x:%04xEnabling flash write... OK. PROBLEMS, continuing anyway FATAL ERROR! dualbiosindexDualBIOS: Selected chip: %d Serial flash pin %i Serial flash port 0x%04x it87spiportAborting to be safe. %s: invalid clock: %s kHz Using device %s %s: failed to open %s: %s Using %ukHz clock Cannot open %s: %s. Cannot read %s: %s. %s: max_kernel_buf_size: %zu Flash bus type is LPC Flash bus type is SPI Odd. SMBus device not found. MCP SPI BAR is at 0x%08x MCP SPI is not used. NVIDIA MCP6x SPIDescr.0x%02x: 0x%08x (PBR%u) ich_spi_modehwsequser selected hwseq swsequser selected swseq autouser selected auto 0x04: 0x%04x (HSFS) 0x06: 0x%04x (HSFC) 0x08: 0x%08x (FADDR) 0x0c: 0x%08x (DLOCK) DLOCK: SBMWAG_LOCKDNSBMRAG_LOCKDN%s=%d, PR0_LOCKDNPR1_LOCKDNPR2_LOCKDNPR3_LOCKDNPR4_LOCKDNSSEQ_LOCKDN0x50: 0x%08x (FRAP) BMWAG 0x%02x, BMRAG 0x%02x, BRWA 0x%02x, BRRA 0x%02x 0x%02X: 0x%08x read-writePR%u is 0x%08x already. , trying to set it to 0x%08x resulted in 0x%08x. 0x%zx: 0x%02x (SSFS) Clearing SSFS.FCERR 0x%zx: 0x%06x (SSFC) 0x%zx: 0x%04x (PREOP) 0x%zx: 0x%04x (OPTYPE) 0x%zx: 0x%08x (OPMENU) 0x%zx: 0x%08x (OPMENU+4) 0x%x: 0x%08x (BBAR) 0x%x: 0x%08x (VSCC) 0x%x: 0x%08x (LVSCC) LVSCC: 0x%x: 0x%08x (UVSCC) UVSCC: 0x%x: 0x%08x (FPB) === Content Section === FLVALSIG 0x%08x FLMAP0 0x%08x FLMAP1 0x%08x FLMAP2 0x%08x --- Details --- Component 2 is not used. Fast Read is %ssupported. No forbidden opcodes. === Region Section === FLREG%zd 0x%08x Region %d (%-7s) is unused. 0x%08x - 0x%08x === Master Section === FLMSTR%zd 0x%08x EC%-4s %c%c TXE %c%c checking for opcode 0x%02x %s: null OPCODES pointer! === Component Section === FLCOMP 0x%08x FLILL 0x%08x FLILL1 0x%08x DEIE ME BIOS FD Reg15Reg14Reg13OpROM10GbE IE DE2 BMC Reg7BIOS2 DE Pltf GbE %s: unsupported chipset Transaction error! timeout, REG_SSFS=0x%08x Running OPCODE 0x%02x failed at address 0x%06x (payload length was %d). The data was: %3d: 0x%02x Opcode %x not found. Error: SCIP never cleared! Intel NIC flashIntel NIC control/status regwrite read GPIOSPI_DOSPI_HOLD66 MHzSPI base address is at 0x%x SB600 SPI registersSB6xx detected. SB7xx/SP5100 detected. Hudson-2/3/4 detected. Bolton detected. Yangtze detected. Promontory detected. SpiRomEnable=%i, RouteTpm2Sp=%i, PrefetchEnSPIFromIMC=%i, SpiOpEnInLpcMode=%i, PrefetchEnSPIFromHost=%i (0x%08x) SpiArbEnable=%i, IllegalAccess=%i, SpiBridgeDisable=%i, SpiBusy=%iUsing SPI_CS%d GPIO11 used for %s SPI_DIGPIO12 used for %s Not enabling SPIGPIO31 used for %s SpiReadMode=%s (%i) Normal (up to 66 MHz)Enabling Spi100 failed. Enabling Spi100 succeeded. NormSpeedNew is %s FastSpeedNew is %s AltSpeedNew is %s TpmSpeedNew is %s NormSpeed is %s Setting SPI clock failed. amd_imc_forceyesamd_imc_force enabled. IMC is not active. No IMC found. Shutting down IMC failed. : LPC: PCI: FWH: SPIUseSpi100 is %sabled Fast Reads are %sabled Disabling them temporarily. GPIO47 used for %s SPI_CLKGPIO32 used for %s SPI_CSFlash DescriptorManagement EngineGigabit EthernetPlatform DataDevice ExpansionEC/BMClockedread-onlywrite-only20 MHz33 MHz50 MHz48 MHz30 MHz40 MHz25 MHz14 MHz / 17 MHzPlatf.DevExpOtherUnknownLow Profile DesktopMini TowerPortableLaptopHand HeldSub NotebookMain Server ChassisRack Mount ChassisSealed-case PCMulti-systemSB400AMDSB600SB7x0/SB8x0/SB9x0SC1100CS5536Elan SC520AMD-768AMD-8111FCHFP4SiS501/5101/550185C496+497540620635640645645DX648651655661730733735740741745746748755551155715591/559255965597/5598/5581/5120CS5530(A)ALiM1533nForce4/MCP4CK804NForce2NForce3MCP51MCP55MCP61MCP65MCP67MCP78SMCP73MCP79MCP89VT82C585VPXVT82C595VT82C597VT8601/VT8601AVT82C69xVT8601TVT82C586A/BVT82C596VT82C686A/BVT8233VT8233AVT8235VT8237(R)VT8251VT8237AVT8237SVT8231CX700VX800/VX820VX855/VX875VX900BroadcomOSB4HT-1000RDCR8610/R3210S12x0Bay TrailMPIIXZ68UM67HM65H67HM67Q65QS67Q67QM67B65C202C204C206H61C60x/X79Z77Z75Q77Q75B75H77C216QM77QS77HM77UM77HM76HM75HM70NM70Avoton/RangeleyBraswellDH89xxCC (Cave Creek)Coleto CreekICH0ICH2ICH2-MC-ICHICH3-SICH3-MICH4/ICH4-LICH4-MICH5/ICH5R6300ESBICH6/ICH6RICH6-MICH6W/ICH6RW631xESB/632xESB/3100ICH7DHICH7/ICH7RICH7MNM10ICH7MDHICH8/ICH8RICH8M-EICH8DHICH8DOICH8MICH9 Eng. SampleICH9DHICH9DOICH9RICH9M-EICH9ICH9MICH10R Eng. SampleICH10DOICH10RICH10ICH10DICH10 Eng. Sample3400 Desktop3400 MobilePM55H55QM57H57HM55Q57HM573400 Mobile SFFB55QS57340034203450EP80579PIIX3PIIX4/4E/4M440MXSCH PoulsboAtom E6xx(T) (Tunnel Creek)Lynx Point Mobile Eng. SampleZ87Z85HM86H87HM87Q85Q87QM87B85C222C224C226H819 Series9 Series Engineering SampleZ97H97C610/X99 (Wellsburg)Lynx Point LP Eng. SampleLynx Point LP PremiumLynx Point LP MainstreamLynx Point LP ValueHaswell U SampleBroadwell U SampleBroadwell U PremiumBroadwell U BaseBroadwell Y SampleBroadwell Y PremiumBroadwell Y BaseBroadwell HSkylake / Kaby Lake SampleSkylake U BaseSkylake Y PremiumSkylake U PremiumKaby Lake Y w/ iHDCP2.2 Prem.Kaby Lake U w/ iHDCP2.2 Prem.Kaby Lake U w/ iHDCP2.2 BaseKabe Lake w/ iHDCP2.2 SampleKaby Lake U BaseKaby Lake Y PremiumKaby Lake U PremiumCannon Lake U PremiumSunrise Point Desktop SampleSunrise Point Unknown SampleH110H170Z170Q170Q150B150C236C232Sunrise Point Server SampleQM170HM170CM236QMS180HM175QM175CM238QMU185C621 Series Chipset (QS/PRQ)C622 Series Chipset (QS/PRQ)C624 Series Chipset (QS/PRQ)C625 Series Chipset (QS/PRQ)C626 Series Chipset (QS/PRQ)C627 Series Chipset (QS/PRQ)C628 Series Chipset (QS/PRQ)C624 Series Chipset SuperskuC627 Series Chipset SuperskuC621 Series Chipset SuperskuC628 Series Chipset SuperskuC620 Series Chipset SuperskuH270Z270Q270Q250B250Z370X299Apollo LakeH310H370Z390Q370B360C246C242QM370HM370CM246Ice Lake U PremiumNormal (up to 33 MHz)ReservedDual IO (1-1-2)Quad IO (1-1-4)Dual IO (1-2-2)Quad IO (1-4-4)Fast Read22 MHz16.5 MHz100 MHz800 kHzTransaction error between offset 0x%08x and 0x%08x (= 0x%08x + %d)! Timeout error between offset 0x%08x and 0x%08x (= 0x%08x + %d)! Hardware sequencing reports %d attached SPI flash chipThere is only one partition containing the whole address space (0x%06x - 0x%06x). There are %d erase blocks with %d B each. The flash address space (0x%06x - 0x%06x) is divided at address 0x%06x in two partitions. The first partition ranges from 0x%06x to 0x%06x. In that range are %d erase blocks with %d B each. The second partition ranges from 0x%06x to 0x%06x. Erase block size for address 0x%06x is %d B, but requested erase block size is %d B. Not erasing anything. Erase address 0x%06x is not aligned to the erase block boundary (any multiple of %d). Not erasing anything. Request to erase some inaccessible memory address(es) (addr=0x%x, len=%d). Not erasing anything. Erasing %d bytes starting at 0x%06x. Request to read from an inaccessible memory address (addr=0x%x, len=%d). Reading %d bytes starting at 0x%06x. Request to write to an inaccessible memory address (addr=0x%x, len=%d). Writing %d bytes starting at 0x%06x. %s called with unsupported readcnt %i. %s called with unsupported writecnt %i. AMD SPI FIFO pointer corruption! Pointer is %d, wanted %d Something else is accessing the flash chip and causes random corruption. Please stop all applications and drivers and IPMI which access the flash chip. AMD SPI FIFO pointer is %d, wanted %d W83627 not found at 0x%x, id=0x%02x want=0xa0. W83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0) W83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0) %s: unsupported command type wr=%d rd=%d Warning: Failed to enable flash write on "%s" Changed ROM decode range to 0x%02x successfully. Set ROM enable bit successfully. Setting register 0x6d to 0x%02x on %s failed. ERROR: SMBus device not found. Aborting. %s: Winbond saved on 4 register bits so max chip size is 1024 kB! Can not unlock existing protection in register 0x%02x. Unlocking protection in register 0x%02x... Could not unlock protection in register 0x%02x (new value: 0x%x). Could not unlock protection in register 0x%02x (new value: 0x%08x). %d locks could not be disabled, disabling writes (reads may also fail). Setting register 0x%02x to 0x%02x on %s failed. AMD Elan SC520 detected, but no BOOTCS. Assuming flash at 4G. 0x6c: 0x%04x (CLOCK/DEBUG) Warning: SPI Configuration Lockdown activated. %s: Unsupported chipset %x:%x! Could not find South-North Module Interface Control device! %s, cmd=0x%02x, writecnt=%d, readcnt=%d Unexpected change in AMD SPI read/write count! Error occurred when reading %s Cannot read 0x%06x bytes at 0x%06x: %s Cannot write 0x%06x bytes at 0x%06x %s: device does not support erasing. Please file a bug report at flashrom@flashrom.org %s: mtd_numeraseregions must be 0 Invalid device number %s. Use flashrom -p linux_mtd:dev=N where N is a valid MTD device number. MTD device %d type is not "nor" MTD erase size is not a power of 2 Non-uniform eraseblock size is unsupported. %s: device_name: "%s", is_writeable: %d, numeraseregions: %lu, total_size: %lu, erasesize: %lu Cannot open file stream for %s Missing argument for boardenable. Unknown argument for boardenable: %s Missing argument for boardmismatch. Unknown argument for boardmismatch: %s Unknown argument for laptop: %s -p internal:mainboard: vendor="%s", model="%s" Missing argument for mainboard. Failed getting access to coreboot low tables. Failed getting access to coreboot high tables. coreboot table found at 0x%lx. coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not match the current coreboot IDs of the mainboard (%s:%s). Warning: Could not register DMI shutdown function - continuing without DMI info. DMI table is broken (bogus header)! DMI string chassis-type: "%s" DMI table is broken (chassis_type out of bounds)! DMI table is broken (offset out of bounds)! DMI table is broken (string portion out of bounds)! DMI chassis-type is not specific enough. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Found ITE Super I/O, ID 0x%04hx on port 0x%x Active config mode, unknown reg 0x20 ID: %02x. Found Winbond Super I/O, id 0x%02hx Winbond Super I/O probe weirdness: Port mismatch for ID 0x%02x at port 0x%04x W836xx hardware monitor disabled or does not exist. W836xx Hardware Monitor at port %04x W836xx hardware monitor busy, ignoring it. W836xx hardware monitor vendor ID weirdness: expected 0x5ca3, got %04x Probably not a Winbond Super I/O W83 series hardware monitor device ID weirdness: expected 0x%02x, got 0x%02x Found ITE EC, ID 0x%04hx, Rev 0x%02x on port 0x%x. Warning: unexpected second chipset match: "%s %s" ignoring, please report lspci and board URL to flashrom@flashrom.org with 'CHIPSET: your board name' in the subject line. ERROR: This chipset is not supported yet. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom@flashrom.org including a verbose (-V) log. Thank you! Skipping chipset enable: No supported buses enabled. OK - searching further chips. WARNING: No chipset found. Flash detection will most likely fail. Enabling IT8705F flash ROM interface write. IT8705F with very unusual settings. Please send the output of "flashrom -V -p internal" to flashrom@flashrom.org with "IT8705: your board name: flashrom -V" as the subject to help us finish support for your Super I/O. Thanks. Inconsistent IT8705F decode size! IT8705F flash data pins disabled! IT8705F flash address pins 0-7 disabled! IT8705F flash address pins 8-15 disabled! IT8705F flash write enable pin disabled! IT8705F flash chip select pin disabled! IT8705F flash read strobe pin disabled! IT8705F flash address pins 16-17 disabled! Maximum IT8705F parallel flash decode size is %u. Not enabling IT8705F flash write. No IT8705F flash segment enabled. DualBIOS: Invalid chip index requested - choose 0 or 1. DualBIOS: Previous chip index: %d DualBIOS: Chip selection failed. No IT87* serial flash segment enabled. Serial flash segment 0x%08x-0x%08x %sabled Error: it87spiport specified, but no valid port specified. Port must be a multiple of 0x8 and lie between 0x100 and 0xff8. Forcing serial flash port 0x%04x Overriding chipset SPI with IT87 SPI. Super I/O ID 0x%04hx is not on the list of flash-capable controllers. No suitable board enable found for vendor="%s", model="%s". No board enable found matching coreboot IDs vendor="%s", model="%s". Warning: The mainboard-specific code for %s %s has not been tested, and thus will not be executed by default. Depending on your hardware, erasing, writing or even probing can fail without running this code. Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection "internal programmer") for details. NOTE: Running an untested board enable procedure. Please report success/failure to flashrom@flashrom.org. Enabling full flash access for board "%s %s"... ======================================================================== You seem to be running flashrom on an unknown laptop. Some internal buses have been disabled for safety reasons. You may be running flashrom on an unknown laptop. We could not detect this for sure because your vendor has not set up the SMBIOS tables correctly. Some internal buses have been disabled for safety reasons. You can enforce using all buses by adding -p internal:laptop=this_is_not_a_laptop to the command line, but please read the following warning if you are not sure. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and https://flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== LPC write to serial flash %sabled Enabling LPC write to serial flash Using default %ukHz clock. Use 'spispeed' parameter to override. No SPI device given. Use flashrom -p linux_spi:dev=/dev/spidevX.Y %s: failed to set speed to %uHz: %s %s: failed to set SPI mode to 0x%02x: %s %s: failed to set the number of bits per SPI word to %u: %s /sys/module/spidev/parameters/bufsizCannot read %s: file is empty. Buffer size %ld from %s seems wrong. %s: Using value from %s as max buffer size. %s: Using page size as max buffer size. ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 is %i Flash bus type is unknown (none) Please send the log files created by "flashrom -p internal -o logfile" to flashrom@flashrom.org with "your board name: flashrom -V" as the subject to help us finish support for your chipset. Thanks. ERROR: SMBus device not found. Not enabling SPI. Found SMBus device %04x:%04x at %02x:%02x:%01x Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid. Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled. SPI control is 0x%04x, req=%i, gnt=%i MCP6X bitbang SPI master init failed! WARNING: SPI Configuration Lockdown activated. Missing argument for ich_spi_mode. Unknown argument for ich_spi_mode: %s SPI Configuration is locked down. The Flash Descriptor Override Strap-Pin is set. Restrictions implied by the Master Section of the flash descriptor are NOT in effect. Please note that Protected Range (PR) restrictions still apply. 0x%02X: 0x%08x FREG%u: %s region is unused. FREG%u: %s region (0x%08x-0x%08x) is %s. FREG%u: %s region (0x%08x-0x%08x) has unknown permissions. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. 0x%02X: 0x%08x (%sPR%u is unused) %sPR%u: Warning: 0x%08x-0x%08x is %s. At least some flash regions are write protected. For write operations, you should use a flash layout and include only writable regions. See manpage for more details. At least some flash regions are read protected. You have to use a flash layout and include only accessible regions. For write operations, you'll additionally need the --noverify-all switch. See manpage for more details. %s: number of regions too high (%d) - failed NR (Number of Regions): %5zd FRBA (Flash Region Base Address): 0x%03x NC (Number of Components): %5d FCBA (Flash Component Base Address): 0x%03x ISL (ICH/PCH/SoC Strap Length): %5d FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x%03x %s: number of masters too high (%d) - failed NM (Number of Masters): %5zd FMBA (Flash Master Base Address): 0x%03x MSL/PSL (MCH/PROC Strap Length): %5d FMSBA (Flash MCH/PROC Strap Base Address): 0x%03x Component 1 density: %s Component 2 density: %s Read Clock Frequency: %s Read ID and Status Clock Freq.: %s Write and Erase Clock Freq.: %s Fast Read Clock Frequency: %s Dual Output Fast Read Support: %sabled Invalid instruction 0: 0x%02x Invalid instruction 1: 0x%02x Invalid instruction 2: 0x%02x Invalid instruction 3: 0x%02x Invalid instruction 4: 0x%02x Invalid instruction 5: 0x%02x Invalid instruction 6: 0x%02x Invalid instruction 7: 0x%02x %s: number of regions too high (%d). %s: number of masters too high (%d). FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9 RegA RegB RegC RegD RegE RegF FD IFWI TXE n/a Platf DevExp Descr. BIOS ME GbE Platf. BIOS %c%c %c%c %c%c %c%c %c%c ME %c%c %c%c %c%c %c%c %c%c GbE %c%c %c%c %c%c %c%c %c%c Enabling hardware sequencing due to multiple flash chips detected. Enabling hardware sequencing by default for Apollo Lake. Hardware sequencing was requested but the flash descriptor is not valid. Aborting. Could not determine density of flash component %d. Enabling hardware sequencing by default for 100+ series PCH. Enabling hardware sequencing because some important opcode is locked. Reading flash descriptors mapped by the chipset via FDOC/FDOD...%s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s: preop=%04x optype=%04x opmenu=%08x%08x on-the-fly OPCODE (0x%02X) re-programmed, op-pos=%d OPCODE 0x%02x has unsupported length, will not execute. Invalid OPCODE 0x%02x, will not execute. %s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =4 %s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =1 %s: Internal command size error for opcode 0x%02x, got writecnt=%i, want >=4 %s: Internal command size error for opcode 0x%02x, got readcnt=%i, want =0 %s: Addressed region 0x%06x-0x%06x not in allowed range 0x%06x-0x%06x %s: Internal command size error for opcode 0x%02x, got datalength=%i, want <=%i timeout, ICH7_REG_SPIS=0x%04x %s: Two subsequent preopcodes 0x%02x and 0x%02x, ignoring the first. Chipset %s%sprotected flash from 0x%08x to 0x%08x, unlocking...Disabling %s%sprotection of flash addresses from 0x%08x to 0x%08x failed. Trying to determine the generation of the SPI interface... SB8xx/SB9xx/Hudson-1 detected. SB device found but SMBus revision 0x%02x does not match known values. Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom@flashrom.org FCH device found but SMBus revision 0x%02x does not match known values. Please report this to flashrom@flashrom.org and include this log and the output of lspci -nnvx, thanks!. %s: Unknown LPC device %x:%x. Please report this to flashrom@flashrom.org and include this log and the output of lspci -nnvx, thanks! Could not determine chipset generation., AltSpiCSEnable=%i, AbortEnable=%i, SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i, DropOneClkOnRd/SpiClkGate=%iERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access. Setting read mode to "%s" failed. Setting read mode to "%s" succeeded. Setting SPI clock to %s (0x%x). Missing argument for amd_imc_force. Unknown argument for amd_imc_force: "%s" (not "yes"). Writes have been disabled for safety reasons because the presence of the IMC was detected and it could interfere with accessing flash memory. Flashrom will try to disable it temporarily but even then this might not be safe: when it is re-enabled and after a reboot it expects to find working code in the flash and it is unpredictable what happens if there is none. To be safe make sure that there is a working IMC firmware at the right location in the image you intend to write and do not attempt to erase. You can enforce write support with the amd_imc_force programmer option. Shutting down IMC successful. ROM strap override is %sactiveContinuing with write support because the user forced us to! No SMBus device with ID %04X:%04X found. Lynx Point Desktop Eng. Samplelinux_spi_send_commandlinux_spi_initget_mtd_infolinux_mtd_erasewbsio_spi_send_commandwbsio_check_for_spispi100_spi_send_commandsb600_spi_send_commandspi_write_enableit8716f_spi_send_commandread_ich_descriptors_via_fdoprettyprint_ich_descriptor_regionprettyprint_ich_descriptor_master find_preopich_spi_send_multicommand run_opcodeich_spi_send_commandprogram_opcodesfind_opcode Rdetermine_generationenable_flash_vt_vxEnabling eeprom access failed. %s: control register stuck at %08x, ignoring. serprog: requested mapping %s is incompatible: 0x%zx bytes at 0x%0*lx. At least one block is locked and lockdown is active! block lock at %06x is %slocked! Reading the status register failed! Sending disable lockdown failed! %s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x %s: error sending erase command! %s: chip did not become ready again after sending the erase command! %s: cannot erase partial pages: addr=%u, blocklen=%u %s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u %s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u %s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u %s: cannot erase partial sectors: addr=%u, blocklen=%u FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x, failed byte count from 0x%08x-0x%08x: 0x%x Erasing and writing flash chip... Looking for another erase function. eraseblock layout is known, but matching block erase function is not implemented. block erase function found, but eraseblock layout is not defined. Reading current flash chip contents... Can't read anymore! Aborting. Warning: Chip content is identical to the requested image. No usable erase functions left. %s: man_id 0x%02x, dev_id 0x%06x, man_id seems to be normal flash content, dev_id seems to be normal flash contentChip lacks correct probe timing information, using default 10ms/40us. Chip has negative value in probe_timing, failing without chip access ERROR: flashrom has no read function for this flash chip. Error: %s called with start 0x%x + len 0x%x > total_size 0x%x Verification impossible because read failed at 0x%x (len 0x%x) pre-rounding: start=0x%0*lx, len=0x%zx, end=0x%0*lx post-rounding: start=0x%0*lx, len=0x%zx, end=0x%0*lx Total packetsize (%i) is greater than 64 supported, aborting. Unexpected number of bytes transferred, expected %i, got %i! STLINK_BRIDGE_GET_RWCMD_STATUSFailed to set the NSS pin to low Failed to issue the STLINK_BRIDGE_WRITE_SPI command: '%s' Failed to send the data after the STLINK_BRIDGE_WRITE_SPI command: '%s' Failed to issue the STLINK_BRIDGE_READ_SPI command: '%s' Failed to retrive the STLINK_BRIDGE_READ_SPI answer: '%s' Failed to set the NSS pin to high %s: tried to physunmap without valid data! Trying to unmap a nonexisting mapping! Please report a bug at flashrom@flashrom.org Chip status register is 0x%02x Chip status register: Bit 7 / Ready is %sset Chip status register: Bit 6 / Compare match is %sset Chip status register: Bit %i is %sset Chip status register: Density is %u Mb Chip status register: Bit 1 / Protection is %sset Chip status register: Bit 0 / "Power of 2" is %sset %s: total size %i kB, page size %i B %s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u %s: error sending read command! %s: cannot write partial pages: start=%u, len=%u %s: tried to write beyond flash boundary: start=%u, len=%u, size=%u %s: error sending buffer write! %s: filling the buffer failed! %s: error sending buffer to main memory command! %s: chip did not become ready again! %s: Retrying read with greater buffer length! %s: Maximum buffer length reached and data still not ready! %s: Start address is not page-aligned! %s: Length is not page-aligned! %s: Timed out waiting for SPI not busy! %s: Block erase size is not page size! %s: Unsupported granularity! Please report a bug at flashrom@flashrom.org Incomplete SPI bitbang master setting! Please report a bug at flashrom@flashrom.org %s: File descriptor is invalid. Could not fetch original serial port configuration: Could not set custom baudrate: Could not fetch serial port configuration: Warning: given baudrate %d rounded down to %d. Using slowest possible baudrate: %d. Could not set serial baud rate: Could not change serial port configuration: Could not fetch new serial port configuration: Some requested serial options did not stick, continuing anyway. observed wanted c_cflag: 0x%08lX 0x%08lX c_lflag: 0x%08lX 0x%08lX c_iflag: 0x%08lX 0x%08lX c_oflag: 0x%08lX 0x%08lX Could not set baud rates exactly. Actual baud flags are: ispeed: 0x%08lX, ospeed: 0x%08lX Could not get serial port mode: Could not set serial port mode to blocking: Warning: Automatic command availability check failed for cmd 0x%02x - won't execute cmd Error: cannot write op code: %s Error: cannot write parameters: %s Error: cannot read from device: %s Error: invalid response 0x%02X from device (to command 0x%02X) Error: cannot read return parameters: %s Error: cannot read from device (flushing stream)Error: NAK to a stream buffer operation Error: Invalid reply 0x%02X from device Error: cannot malloc command buffer serprog: Passing write-n bytes=%d addr=0x%x serprog: Error: cannot write write-n command serprog: Error: cannot write write-n dataError: could not transfer write buffer Error: could not execute command buffer serprog: Executed operation buffer of %d bytes serprog_delay used, but programmer doesn't support delays natively - emulating Error: could not execute command buffer before sending SPI commands. Error: could not allocate SPI send param buffer. Could not flush command buffer. serprog: Output drivers disabled serprog: %s: Warning: could not disable output buffers %s addr=0x%lx returning 0x%02X Tried to register more than %i shutdown functions. Tried to register a shutdown function before programmer init. Enabling flash write access failed. Could not open device PICkit2! Could not set USB device configuration. Could not claim USB device interface Command Get Firmware Version failed! PICkit2 Firmware Version: %d.%d Command Set SPI Speed failed! Error: Invalid 'spispeed' value. Error: No valid device specified. Use flashrom -p pony_spi:dev=/dev/device[,type=name] Error: Missing argument for programmer type. Error: Invalid programmer type specified. No programmer compatible with %s detected. No baudrate specified, using the hardware's defaults. Error: Both host and device specified. Please use either dev= or ip= but not both. Error: Neither host nor device specified. Use flashrom -p serprog:dev=/dev/device:baud or flashrom -p serprog:ip=ipaddr:port Error: No port specified. Use flashrom -p serprog:ip=ipaddr:port Error: serprog cannot open socket: %s Error: serprog cannot connect: %s Error: serprog cannot set socket options: %s serprog: connected - attempting to synchronize Error: cannot synchronize protocol - check communications and reset device? Error: NAK to query interface version Error: Unknown interface version: %d serprog: Interface version ok. Error: query command map not supported Warning: NAK to query supported buses serprog: Bus support: parallel=%s, LPC=%s, FWH=%s, SPI=%s Error: SPI operation not supported while the bustype is SPI serprog: Maximum write-n length is %d serprog: Maximum read-n length is %d Error: Could not convert 'spispeed'. Error: Garbage following 'spispeed' value. serprog: Warning: Setting the SPI clock rate is not supported! serprog: Requested to set SPI clock frequency to %u Hz. It was actually set to %u Hz serprog: Setting SPI clock rate to %u Hz failed! Error: Initialize operation buffer not supported Error: Write to opbuf: delay not supported Error: Single byte read not supported Error: Read n bytes not supported Error: Write to opbuf: write byte not supported serprog: Write-n not supportedError: cannot allocate memory for Write-n buffer serprog: Maximum read-n length not reported Warning: NAK to query programmer name serprog: Programmer name is "%s" Warning: NAK to query serial buffer size serprog: Serial buffer size is %d Error: Execute operation buffer not supported Error: NAK to initialize operation buffer Warning: NAK to query operation buffer size serprog: operation buffer size is %d Error: could not enable output buffers serprog: Output drivers enabled serprog: Warning: Programmer does not support toggling its output drivers Error: No host specified. Use flashrom -p serprog:ip=ipaddr:port Error: No device specified. Use flashrom -p serprog:dev=/dev/device[:baud] Opening STLINK-V3 with serial: %s No STLINK-V3 seems to be connected with serial %s Could not find any connected STLINK-V3 The spispeed parameter passed with invalid format: %s Please pass the parameter with a simple number in kHz Connected to STLink V3 with bridge FW version: %d Your STLink V3 has too old version of the bridge interface Please update the firmware with the STSW-LINK007 which can be downloaded from here: https://www.st.com/en/development-tools/stsw-link007.htmlFailed to calculate SPI clock prescalerERROR: Could not get I/O privileges (%s). Error: iobase= specified, but the I/O base given was invalid. It must be a multiple of 0x4 and lie between 0x100 and 0xfffc. Non-default I/O base requested. This will not change the hardware settings. Using address 0x%x as I/O base for parallel port access. Error: Invalid device type specified. Not mapping %s, zero size at 0x%0*lx. Critical error: open(/dev/mem): %s Error accessing %s, 0x%zx bytes at 0x%0*lx In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27), CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options. Please check if either is enabled in your kernel before reporting a failure. You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but disabling the other option unfortunately requires a kernel recompile. Sorry! %s: Could not register shutdown function! Intel Gigabit NIC w/ SPI EEPROMController reports no EEPROM is present. Intel i210 NIC w/ emulated EEPROMIntel I210 Gigabit w/ SPI flashFlash is in Secure Mode. Abort. Unable to clear Flash Access Error. Abort Intel Gigabit NIC w/ SPI flashIntel 10 Gigabit NIC w/ SPI flashPlease use flashrom -p ogp_spi:rom=... to specify which flashchip you want to access. Invalid or missing rom= parameter. PCI BAR2 (Flash/NVRAM) Control: Warning! Either the straps are incorrect or you have no flash or someone overwrote the strap values! Warning: Flash seems unconnected. %s: hwversion 0x%02x, ediid 0x%02x %s: mapping %s from 0x%0*lx to 0x%0*lx Could not map flash chip %s at 0x%0*lx. Could not map flash chip registers %s at 0x%0*lx. Write/erase is not working yet on your programmer in its current configuration. Read is not working on this chip. flashrom has no read function for this flash chip. Erase is not possible on this chip. Erase is not working on this chip. flashrom has no erase function for this flash chip. Write is not possible on this chip. Write is not working on this chip. flashrom has no write function for this flash chip. Warning: Address range of region "%s" exceeds the current chip's address space. Error: Size of the address range of region "%s" is not positive. Requested regions can not be handled. Aborting. Programmer doesn't support this chip. Aborting. Failed to set correct 4BA mode! Aborting. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Flash image seems to have garbage in the ID location. Disabling coreboot-related checks. coreboot last image size (not ROM size) is %d bytes. This coreboot image matches this mainboard. This coreboot image (%s:%s) does not appear to be correct for the detected mainboard (%s:%s). Proceeding anyway because user forced us to. Aborting. You can override this with -p internal:boardmismatch=force. Assuming old flash chip contents as ref-file... Reading old flash chip contents... Checking if anything has changed. Good, writing to the flash chip apparently didn't do anything. This means we have to add special support for your board, programmer or flash chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom@flashrom.org, thanks! ------------------------------------------------------------------------------- You may now reboot or simply leave the machine running. Please check the connections (especially those to write protection pins) between the programmer and the flash chip. If you think the error is caused by flashrom please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom@flashrom.org, thanks! Apparently at least some data has changed. Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom@flashrom.org with the subject "FAILED: "! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom@flashrom.org, thanks! fmap size exceeds buffer boundary. Unable to find fmap in provided buffer. Density encoding is unknown on this chipset. Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x while maximum allowed is 0x%x. Peculiar firmware descriptor, assuming Apollo Lake compatibility. Peculiar firmware descriptor, assuming Ibex Peak compatibility. Peculiar firmware descriptor, assuming Wildcat Point compatibility. Unknown firmware descriptor, assuming 300 series compatibility. The firmware descriptor looks like a Skylake/Sunrise Point descriptor. However, the read frequency isn't set to 17MHz (the only valid value). Please report this message, the output of `ich_descriptors_tool` for your descriptor and the output of `lspci -nn` to flashrom@flashrom.org The firmware descriptor has the read frequency set to 17MHz. However, it doesn't look like a Skylake/Sunrise Point compatible descriptor. Please report this message, the output of `ich_descriptors_tool` for your descriptor and the output of `lspci -nn` to flashrom@flashrom.org writing sector at 0x%lx failed! %s called with incorrect arguments Xilinx Parallel Cable III (DLC 5)Flash update failed byteblaster_preinit byteblaster_shutdown stk200_init stk200_shutdown dlc5_preinit dlc5_shutdown %s: id1 0x%02x, id2 0x%02x, id1 parity violation, id1 is normal flash content, id2 is normal flash contentmaster lock is unlocked! Unlock: Done! Status register: 0x%02x. Disabling lockdown failed! %s: id1 0x%04x, id2 0x%04x Trying erase function %zi... not defined. 0x%06x-0x%06x:done. Erase/write done. %s called with unknown mask , man_id parity violationRestoring MMIO space at %p Could not allocate memory! page_size=%lx Send SPI failed! Receive SPI failed Command Shutdown failed! Pony SPI shutdown completed. STLINK_BRIDGE_CLOSESTLINK_BRIDGE_CS_SPISPI read/write failure: %d AT45DB321Clockprotect%s: unknown page size %d. Writing page %u failed! %s: committing page failed! %s: Unable to enable SPI! %s: Unable to disable SPI! %s: Unable to execute 8051! %s: Unable to disable EDI! Can't read! Aborting. ERASE FAILED! Could not lseek() MSR: %s Could not read() MSR: %s Error: %sUsing custom baud rate. Cannot open serial port: Serial port write error! Empty write Serial port is unresponsive! Serial port read error! Empty read Error: cannot write command %s usecs=%d serprog: readb bytereadReady:Busy:BE SUSPEND:BE RUN/FINISH:BE ERROR:BE OK:PROG ERR:PROG OK:VP ERR:VPP OK:PROG SUSPEND:PROG RUN/FINISH:WP|TBL#|WP#,ABORT:UNLOCK:%s: number of sectors=%u millivoltCouldn't initialize libusb! Setting voltage to %i mV. Command Set Voltage failed! Command Setup failed! SI-Progserbangsi_progajaweAJAWeUsing %s programmer pinout. serprog: IP %s port %d Error: cannot resolve %s serprog: Synchronized ST_GETVERSION_EXTFailed to query FW versionSTLINK_BRIDGE_GET_CLOCKSCK frequency set to %d kHz STLINK_BRIDGE_INIT_SPIYou need to be root. rayerRayeR SPIPGMiobaseUsing %s pinout. memory/dev/mem/dev/mem mmap failed: %s %s: Out of memory! bprombioscproms3OGP registersMarvell 88SX7042 registersFlash Parameters: TurnOff=0x%01x Acc2First=0x%01x Acc2Next=0x%01x ALE2Wr=0x%01x WrLow=0x%01x WrHigh=0x%01x Reserved[21:20]=0x%01x TurnOffExt=0x%01x Acc2FirstExt=0x%01x Acc2NextExt=0x%01x ALE2WrExt=0x%01x WrLowExt=0x%01x WrHighExt=0x%01x Reserved[31:28]=0x%01x Expansion ROM BAR Control: ExpROMSz=0x%01x Bar2En=0x%01x BAR2TransAttr=0x%01x BAR2Sz=0x%01x GPIOPortMode=0x%01x Activating I/O BAR at 0x%04x SATA SiI registers%s: reading hwversion failed %s: reading ediid failed %s: Unable to reset 8051! %s: unmapped 0x%0*lx flash chip registersReading flash... Read operation failed! FAILED. Manufacturer: %s Mainboard ID: %s Uh oh. Erase/write failed. Can't even read anymore! Verifying flash... VERIFIED. Found fmap at offset 0x%06zx Out of memory. unused300 series Cannon Point100 series Sunrise Point9 series Wildcat PointAssuming chipset '%s'. %s: excessive loops, i=0x%x retrying. page 0x%lx failed! Unknown ICHICH85 series Ibex Peak6 series Cougar Point7 series Panther Point8 series Lynx PointBaytrail8 series Lynx Point LP8 series Wellsburg9 series Wildcat Point LPC620 series Lewisburgfdpdreg5bios2reg7ecreg9ie10gbereg12reg13reg14reg15512 kB1 MB8 MB16 MB32 MB64 MBxilinxbyteblastermvAltera ByteBlasterMVstk200Atmel STK200/300 adapterwigglerWiggler LPTspi_ttSPI Tiny Tools (SPI_TT LPT)333kE4>;#$####### $probe_jedec_commonerase_chip_block_jedecgetaddrmaskprobe_jedec_29gltoggle_ready_jedec_commonneed_eraseprogrammer_map_flash_regionprogrammer_unmap_flash_regionget_next_write verify_rangeprobe_en29lv640bedi_chip_probeedi_probe_kb9012edi_shutdownedi_chip_readedi_chip_writeedi_chip_block_eraseedi_readat45db_fill_buffer1at45db_commit_buffer1at45db_program_pagespi_write_at45dbspi_erase_at45cs_sectorspi_erase_at45db_chipspi_erase_at45db_sectorspi_erase_at45db_blockspi_erase_at45db_pageat45db_erasespi_read_at45db_e8spi_read_at45dbat45db_convert_addrprobe_spi_at45dbat45db_get_sector_count=*probe_82802ab %K @B  `  %& -g5 =serialport_configphysmap_commonundo_physmapregister_spi_masterserprog_spi_send_commandserprog_delayserprog_chip_readbserprog_chip_writebserprog_shutdownsatasii_wait_done ?@ @@@p?B@\(2@*@Lock status of block at 0x%0*lx is Locked Open (Full Access, Locked Down). Read/Write Lock, Locked Down. Invalid lock change from 0x%02x to 0x%02x requested at 0x%0*lx! Please report a bug at flashrom@flashrom.org Lock bits at 0x%0*lx not changed. Lockdown can't be removed at 0x%0*lx! New value: 0x%02x. Changing lock bits failed at 0x%0*lx! New value: 0x%02x. Changed lock bits at 0x%0*lx to 0x%02x. Enabling lockdown FAILED at 0x%0*lx! New value: 0x%02x. Ignoring RES in favour of RDID. Ignoring RES in favour of REMS. %s failed during command execution Error: WIP bit after WRSR never cleared Missing status register write definition, assuming EWSR is needed Block protection is disabled. Some block protection in effect, disabling... Need to disable the register lock first... Hardware protection is active, disabling write protection is impossible. spi_write_status_register failed. Unsetting lock bit(s) failed. Block protection could not be disabled! Chip status register: Block Protect 4 (BP4) is %sset Chip status register: Block Protect 3 (BP3) is %sset Chip status register: Block Protect 2 (BP2) is %sset Chip status register: Block Protect 1 (BP1) is %sset Chip status register: Block Protect 0 (BP0) is %sset Chip status register is 0x%02x. Chip status register: Write Enable Latch (WEL) is %sset Chip status register: Write In Progress (WIP/BUSY) is %sset Chip status register: Status Register Write Disable (SRWD, SRP, ...) is %sset Chip status register: Block Protect Write Disable (BPL) is %sset Chip status register: Top/Bottom (TB) is %s Chip status register: Sector Protect Size (SEC) is %i KB Chip status register 2 is NOT decoded! Chip status register: Software Protection Status (SWP): Chip status register: Sector Protection Register Lock (SRPL) is %sset Chip status register: Erase/Program Error (EPE) is %sset Chip status register: WP# pin (WPP) is %sasserted Ignoring security lockdown (if present) Ignoring status register byte 2 Chip status register: Write Protect Enable (WPEN) is %sset Chip status register: Bit 6 / Block Protect 4 (BP4) is %sset Chip status register: Bit 5 / Block Protect 3 (BP3) is %sset Chip status register: Bit 3 / Block Protect 1 (BP1) is %sset Chip status register: Bit 2 / Block Protect 0 (BP0) is %sset Chip status register: Sequential Program Mode Status (SPM) is %sset Chip status register: WP# disable (WPDIS) is %sabled Chip status register: Program Fail Flag (P_FAIL) is %sset Chip status register: Erase Fail Flag (E_FAIL) is %sset Chip status register: Auto Address Increment Programming (AAI) is %sset Resulting block protection : %s Lock status for 0x%06x (size 0x%06x) is %02x, Trying to clear lock for 0x%06x... Warning: Unlock Failed for block 0x%06x Using clock_gettime for delay loops (clk_id: %d, resolution: %ldns). Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c %s' if you have a board with such a chip. Software %d kB bootblock locking is %sactive. Software 64 kB bootblock locking is %sactive. Software 16 kB bootblock locking is %sactive. Hardware bootblock locking (#TBL) is %sactive. Hardware remaining chip locking (#WP) is %sactive.. Block locking for W39V080FA in dual mode is undocumented. Hardware bootblock lockout is %sactive. Cannot add fmap entries to layout - Too many entries. Error adding layout entry: %s failed! flashrom has no probe function for this flash chip. === SFDP has autodetected a flash chip which is not natively supported by flashrom yet. The standard operations read and verify should work, but to support erase, write and all other possible featuresAll standard operations (read, verify, erase and write) should work, but to support all possible features we need to add them manually. You can help us by mailing us the output of the following command to flashrom@flashrom.org: 'flashrom -VV [plus the -p/--programmer parameter]' Thanks for your help! === %s %s flash chip "%s" (%d kB, %s) mapped at physical address 0x%0*lx. %s: unknown erase opcode (0x%02x). Please report this at flashrom@flashrom.org %s: invalid input, please report to flashrom@flashrom.org Tried to add a duplicate block eraser: %d x %d B with opcode 0x%02x. Block Eraser %d is already occupied. Block eraser %d: %d x %d B with opcode 0x%02x %s: Not enough space to store another eraser (i=%d). Please report this at flashrom@flashrom.org Receiving SFDP signature failed. Signature = 0x%08x (should be 0x50444653) Receiving SFDP revision and number of parameter headers (NPH) failed. The chip supports an unknown version of SFDP. Aborting SFDP probe! SFDP number of parameter headers is %d (NPH = %d). Receiving SFDP parameter table headers failed. SFDP parameter table header %d/%d: Length %d B, Parameter Table Pointer 0x%06x SFDP Parameter Table %d supposedly overflows addressable SFDP area. This most probably indicates a corrupt SFDP parameter table header. Skipping it. Fetching SFDP parameter table %d failed. ID of the mandatory JEDEC SFDP parameter table is not 0 as demanded by JESD216 (warning only). The chip contains an unknown version of the JEDEC flash parameters table, skipping it. Length of the mandatory JEDEC SFDP parameter table is wrong (%d B), skipping it. Parsing JEDEC flash parameter table... 3-Byte (and optionally 4-Byte) addressing. 4-Byte only addressing (not supported by flashrom). Required addressing mode (0x%x) not supported. volatile and writes to the status register have to be enabled with non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR. 4kB erase opcode is 0x%02x. 4kB erase opcode is not defined. Flash chip size >= 4 Gb/512 MB not supported. Flash chip size is bigger than what 3-Byte addressing can access. It seems like this chip supports the preliminary Intel version of SFDP, skipping processing of double words 3-9. Erase Sector Type %d Size: 0x%02x Erase Sector Type %d is unused. Block size of erase Sector Type %d (2^%d) is too big for flashrom. Erase Sector Type %d Opcode: 0x%02x Unhandled programmer parameters (possibly due to another failure): %s Unhandled programmer parameters: %s Error: Unknown programmer "%s". Valid choices are: Couldn't parse the descriptor! Attempting to read fmap from ROM content. Cannot read %d bytes at offset %zu Cannot read %zu bytes at offset %06zx fmap signature found at %zu but header is invalid. Binary search failed, trying linear search... Failed to read fmap from ROM. Adding fmap layout to global layout. Failed to add fmap regions to layout. Attempting to read fmap from buffer. Failed to read fmap from buffer. Tried to register more than %i master interfaces. %s called with incomplete master definition. Please report a bug at flashrom@flashrom.org %d byte RDID not supported on this SPI controller RDID byte 0 parity violation. RDID byte 1 parity violation. Can't handle 4-byte address for opcode '0x%02x' with this chip/programmer combination. 4-byte address requested but master can't handle 4-byte addresses. %s called for too long a write %s failed during command execution at address 0x%x %s: start address not even! Please report a bug at flashrom@flashrom.org %s: total write length not even! Please report a bug at flashrom@flashrom.org %s failed during followup AAI command execution: %d %s failed to disable AAI mode. %s called, but SPI read chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org %s called, but SPI write chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org All programmers need a valid name, but the one with index %d does not! Programmer %s has neither a device list nor a textual description! Programmer %s does not have a valid type set! Programmer %s does not have a valid init function! Programmer %s does not have a valid delay function! Programmer %s does not have a valid map_flash_region function! Programmer %s does not have a valid unmap_flash_region function! ERROR: Some field of flash chip #%d (%s) is misconfigured. Please report a bug at flashrom@flashrom.org ERROR: Flash chip %s erase function %i region %i has size 0. Please report a bug at flashrom@flashrom.org ERROR: Flash chip %s erase function %i region %i has count 0. Please report a bug at flashrom@flashrom.org Strange: Empty eraseblock definition with non-empty erase function. Not an error. ERROR: Flash chip %s erase function %i region walking resulted in 0x%06x bytes total, expected 0x%06x bytes. Please report a bug at flashrom@flashrom.org ERROR: Flash chip %s erase function %i and %i are identical. Please report a bug at flashrom@flashrom.org ERROR: Board enable #%d does not define a vendor and board name. Please report a bug at flashrom@flashrom.org ERROR: Board enable for %s %s is misdefined. Please report a bug at flashrom@flashrom.org timer loop overflow, reduced precision. delay more than 10%% too short (got %lu%% of expected delay), recalculating... delay loop is unreliable, trying to continue OS timer resolution is unusable. OS timer resolution is %lu usecs, Failed to issue the %s command: '%s' Failed to get %s answer: '%s' Could not set serial port mode to non-blocking: Could not restore serial port blocking behavior: Could not restore serial port mode to blocking: SPIBAR = 0x%0*lx (phys = 0x%08x) Vendor ID: %.*s, part ID: %.*s PC8736x: unexpected ID %02x (expected %02x) PC87360: invalid GPIO base address %04x ERROR: Found Winbond chip with ID 0x%x, expected %x ERROR: winbond_gpio_set: Invalid GPIO number %d ERROR: GPIO%d is not supported yet on this winbond chip ERROR: No supported Winbond Super I/O found ERROR: No IT87 Super I/O GPIO configuration found. ERROR: IT%02X does not allow setting GPIO%02u. ERROR: Failed to read IT87 Super I/O GPIO Base. VIA Apollo ACPI: %sing GPIO%02d. ERROR: VT82C686 PM device not found. ERROR: This Intel LPC bridge does not allow setting GPIO%02d Intel ICH LPC bridge: %sing GPIO%02d. ERROR: No known Intel LPC bridge found. ERROR: VT823x ISA bridge not found. ERROR: VT823x GPIO%02d is not implemented. %s: empty needle! Please report a bug at flashrom@flashrom.org Reading the %s register failed! serprog: Warning: executed operation buffer due to size reasons serprog: Error: cannot read read-n data%s: SPI controller can not send %d bytes, it is limited to %d bytes %s: SPI controller can not receive %d bytes, it is limited to %d bytes OP Type Pre-OP Pre-OP 0: 0x%02x, Pre-OP 1: 0x%02x Board match found, but nothing to do? Reserved bits in BBAR not zero: 0x%08x Setting BBAR to 0x%08x failed! New value: 0x%08x. MX25L12835F/MX25L12845E/MX25L12865EMX25L1605A/MX25L1606E/MX25L1608EMX25L1605D/MX25L1608D/MX25L1673EMX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473FMX25L8005/MX25L8006E/MX25L8008E/MX25V8005W29C010(M)/W29C011A/W29EE011/W29EE012W29C010(M)/W29C011A/W29EE011/W29EE012-oldunknown Winbond (ex Nexcom) SPI chipFull Access. Write Lock (Default State). Write Lock, Locked Down. Read Lock. Read/Write Lock. Read Lock, Locked Down. Enabled lockdown at 0x%0*lx. %s: addr=0x%x, len=%d, data: REMS returned 0x%02x 0x%02x. %s: id1 0x%x, id2 0x%x RDID returnedRES returned%s: id 0x%x %s: id1 0x%02x, id2 0x%02x disabled. ULBPR failed bottomno sectors are protected some sectors are protected all sectors are protected reserved for future use en full access write locked locked open write locked down OKBottom boot block: Top boot block: Lockout bits: fmap %08x - %08x named %s Probing for %s %s, %d kB: complete flashFailed to probe chip: %s Non-SPI, Parallel, LPC, FWH, Programmer-specific, None, Foundon %s. No SFDP signature found. SFDP revision = %d.%d ID 0x%02x, version %d.%d Parameter table contents: 0x%04x: 3-Byte only addressing. Status register is WREN (0x06). EWSR (0x50). Write chunk size is at least 64 B. 1 B only. Flash chip size is %d kB. Memory allocation error! Initializing %s programmer ,Reading ich descriptor... Descriptors don't match! fmap found at offset 0x%06zx Failed to realloc. Cannot read ROM contents. Am29F002(N)BBunnamedCalibrating delay loop... %luM loops per second, 10 myus = %ld us, 100 myus = %ld us, 1000 myus = %ld us, 10000 myus = %ld us, %ld myus = %ld us, Serial port write error: write successful writecnt %u wr_bytes %u wrote %zd bytes readcnt %u rd_bytes %u read %zd bytes Serial port read error: Can't allocate PCI accessor. Can't allocate PCI device. SPIBARBES=0x%x, WG=%d, WSR=%d, WEWS=%d, EO=0x%x, VCL=%d%.*sUsing IT87 GPIO base 0x%04x /dev/cpu/%d/msrMSR was already initialized Error while opening %s: %s Did you run 'modprobe msr'? DroppRaisNo Sector is %sed. Sector 0a is %s%sed. Sector 0b is %s%sed. Sector %2u is %s%sed. Could not write() MSR: %s %s: addr=0x%lx len=%zu invalidReading OPCODES... Programming OPCODES... op[%d]: 0x%02x, %s, %s Stuck at 0x%02x BBAR offset is unknown! none 0 1 read w/o addrwrite w/o addrread w/ addrwrite w/ addr0x70000-0x7ffff0x60000-0x7ffff0x40000-0x7ffffall blocks1F0000H-1FFFFFH1E0000H-1FFFFFH1C0000H-1FFFFFH180000H-1FFFFFH100000H-1FFFFFHallAm29F002(N)BTAm29F010Am29F010A/BAm29F016DAm29F040Am29F040BAm29F080Am29F080BAm29LV001BBAm29LV001BTAm29LV002BBAm29LV002BTAm29LV004BBAm29LV004BTAm29LV008BBAm29LV008BTAm29LV040BAm29LV081BAMICA25L010A25L016A25L020A25L032A25L040A25L05PTA25L05PUA25L080A25L10PTA25L10PUA25L16PTA25L16PUA25L20PTA25L20PUA25L40PTA25L40PUA25L512A25L80PA25LQ032/A25LQ32AA25LQ16A25LQ64A29002BA29002TA29040BA49LF040AAtmelAT25DF021AT25DF021AAT25DF041AAT25DF081AT25DF081AAT25DF161AT25DF321AT25DF321AAT25DF641(A)AT25DL081AT25DL161AT25DQ161AT25F1024(A)AT25F2048AT25F4096AT25F512AT25F512AAT25F512BAT25FS010AT25FS040AT25SF041AT25SF081AT25SF161AT25SF321AT25SL128AAT26DF041AT26DF081AAT26DF161AT26DF161AAT26F004AT29C010AAT29C020AT29C040AAT29C512AT45CS1282AT45DB011DAT45DB021DAT45DB041DAT45DB081DAT45DB161DAT45DB321DAT45DB321EAT45DB642DAT49(H)F010AT49BV512AT49F002(N)AT49F002(N)TAT49F020AT49F040AT49F080AT49F080TAT49LH002AT49LH004AT49LH00B4BrightBM29F040CatalystCAT28F512ENEKB9012 (EDI)ESIES25P16ES25P40ES25P80ESMTF25L008AF25L32PAF49B002UAEonEN25B05EN25B05TEN25B10EN25B10TEN25B16EN25B16TEN25B20EN25B20TEN25B32EN25B32TEN25B40EN25B40TEN25B64EN25B64TEN25B80EN25B80TEN25F05EN25F10EN25F16EN25F20EN25F32EN25F40EN25F64EN25F80EN25P05EN25P10EN25P16EN25P20EN25P32EN25P40EN25P64EN25P80EN25Q128EN25Q16EN25Q32(A/B)EN25Q40EN25Q64EN25Q80(A)EN25QH128EN25QH16EN25QH32EN25QH64EN25S10EN25S16EN25S20EN25S32EN25S40EN25S64EN25S80EN29F002(A)(N)BEN29F002(A)(N)TEN29F010EN29GL064(A)BEN29GL064(A)TEN29GL064H/LEN29GL128EN29LV040(A)EN29LV640BMBM29F004BCMBM29F004TCMBM29F400BCMBM29F400TCMBM29LV160BEMBM29LV160TEGigaDeviceGD25B128B/GD25Q128BGD25LQ128C/GD25LQ128DGD25LQ16GD25LQ32GD25LQ40GD25LQ64(B)GD25LQ80GD25Q10GD25Q127C/GD25Q128CGD25Q16(B)GD25Q20(B)GD25Q256DGD25Q32(B)GD25Q40(B)GD25Q512GD25Q64(B)GD25Q80(B)GD25T80GD25VQ16CGD25VQ21BGD25VQ40CGD25VQ41BGD25VQ80CHyundaiHY29F002BHY29F002THY29F040AISSIIS25LP064IS25LP128IS25LP256IS25WP032IS25WP064IS25WP128IS25WP256IS29GL064BIS29GL064H/LIS29GL064TIS29GL128H/L25F160S33B825F160S33T825F320S33B825F320S33T825F640S33B825F640S33T828F001BN/BX-B28F001BN/BX-T28F002BC/BL/BV/BX-T28F004B5/BE/BV/BX-B28F004B5/BE/BV/BX-T28F008S3/S5/SC28F400BV/BX/CE/CV-B28F400BV/BX/CE/CV-T82802AB82802ACMacronixMX23L12854MX23L1654MX23L3254MX23L6454MX25L1005(C)/MX25L1006EMX25L12805DMX25L1605MX25L1635DMX25L1635EMX25L2005(C)/MX25L2006EMX25L25635F/MX25L25645GMX25L3205(A)MX25L3205D/MX25L3208DMX25L3206E/MX25L3208EMX25L3235DMX25L3273EMX25L4005(A/C)/MX25L4006EMX25L512(E)/MX25V512(C)MX25L6405MX25L6405DMX25L6406E/MX25L6408EMX25L6495FMX25R6435FMX25U12835FMX25U1635EMX25U25635FMX25U3235E/FMX25U51245GMX25U6435E/FMX25U8032EMX29F001BMX29F001TMX29F002(N)BMX29F002(N)TMX29F022(N)BMX29F022(N)TMX29F040MX29GL128FMX29GL320EBMX29GL320EH/LMX29GL320ETMX29GL640EBMX29GL640EH/LMX29GL640ETMX29LV040MX66L51235F/MX25L51245GMicron/Numonyx/STM25P05M25P05-AM25P10M25P10-AM25P128M25P16M25P20M25P20-oldM25P32M25P40M25P40-oldM25P64M25P80M25PE10M25PE16M25PE20M25PE40M25PE80M25PX16M25PX32M25PX64M25PX80M45PE10M45PE16M45PE20M45PE40M45PE80N25Q00A..1GN25Q00A..3GN25Q016N25Q032..1EN25Q032..3EN25Q064..1EN25Q064..3EN25Q128..1EN25Q128..3EN25Q256..1EN25Q256..3EN25Q512..1GN25Q512..3GMicronMT25QL01GMT25QU01GMT25QL02GMT25QU02GMT25QU128MT25QL128MT25QL256MT25QU256MT25QL512MT25QU512V29C51000BV29C51000TV29C51400BV29C51400TV29LC51000V29LC51001V29LC51002NantronicsPMCPm25LD010(C)Pm25LD020(C)Pm25LD040(C)Pm25LD256CPm25LD512(C)Pm25LQ016Pm25LQ020Pm25LQ032CPm25LQ040Pm25LQ080Pm25LV010Pm25LV010APm25LV016BPm25LV020Pm25LV040Pm25LV080BPm25LV512(A)Pm29F002BPm29F002TPm39LV010Pm39LV020Pm39LV040Pm39LV512Pm49FL002Pm49FL004SSTSST25LF020ASST25LF040ASST25LF080(A)SST25VF010(A)SST25VF016BSST25VF020SST25VF020BSST25VF040SST25VF040BSST25VF040B.REMSSST25VF064CSST25VF080BSST25VF512(A)SST25WF010SST25WF020SST25WF020ASST25WF040SST25WF040BSST25WF080SST25WF080BSST25WF512SST26VF016B(A)SST26VF032B(A)SST26VF064B(A)SST28SF040ASST29EE010SST29EE020ASST29LE010SST29LE020SST39SF010ASST39SF020ASST39SF040SST39SF512SST39VF010SST39VF020SST39VF040SST39VF080SST39VF512SST49LF002A/BSST49LF003A/BSST49LF004A/BSST49LF004CSST49LF008ASST49LF008CSST49LF016CSST49LF020SST49LF020ASST49LF040SST49LF040BSST49LF080ASST49LF160CM29F002BM29F002T/NTM29F040BM29F400BBM29F400BTM29W010BM29W040BM29W512BM50FLW040AM50FLW040BM50FLW080AM50FLW080BM50FW002M50FW016M50FW040M50FW080M50LPW080M50LPW116M95M02SanyoLE25FU106BLE25FU206LE25FU206ALE25FU406BLE25FU406C/LE25U40CMCLE25FW106LE25FW203ALE25FW403ALE25FW406ALE25FW418ALE25FW806LE25FW808SharpLH28F008BJT-BTLZ1LHF00L04SpansionS25FL004AS25FL008AS25FL016AS25FL032A/PS25FL064A/PS25FL116K/S25FL216KS25FL127S-256kBS25FL127S-64kBS25FL128P......0S25FL128P......1S25FL128S......0S25FL128S......1S25FL129P......0S25FL129P......1S25FL132KS25FL164KS25FL204KS25FL208KS25FL256S......0S25FL512SSyncMOS/MoselVitelic{F,S,V}29C51001B{F,S,V}29C51001T{F,S,V}29C51002B{F,S,V}29C51002T{F,S,V}29C51004B{F,S,V}29C51004T{S,V}29C31004B{S,V}29C31004TTMS29F002RBTMS29F002RTWinbondW25P16W25P32W25P80W25Q128.VW25Q128.V..MW25Q128.WW25Q128.JW.DTRW25Q16.VW25Q16.WW25Q20.WW25Q256.VW25Q256JV_MW25Q32.VW25Q32.WW25Q40.VW25Q40BWW25Q40EWW25Q64.VW25Q64.WW25Q80.VW25Q80BWW25Q80EWW25X10W25X16W25X20W25X32W25X40W25X64W25X80W29C020(C)/W29C022W29C040/PW29C512A/W29EE512W29GL032CBW29GL032CH/LW29GL032CTW29GL064CBW29GL064CH/LW29GL064CTW29GL128CW39F010W39L010W39L020W39L040W39V040AW39V040BW39V040CW39V040FAW39V040FBW39V040FCW39V080AW39V080FAW39V080FA (dual mode)W49F002U/NW49F020W49V002AW49V002FAZetta DeviceZD25D20ZD25D40SFDP-capable chipProgrammerOpaque flash chipunknown AMIC SPI chipunknown Atmel SPI chipunknown Eon SPI chipunknown Macronix SPI chipunknown PMC SPI chipunknown SST SPI chipunknown ST SPI chipunknown Sanyo SPI chipGenericunknown SPI chip (RDID)unknown SPI chip (REMS)Hh(0I@HPI@H@H@H@H@H@H@H@H@HI@H@H@HpI@H`HIGGIGGGGGGGGGGGGGGGIIGGDIdI------ -@@-))$$*****++@@+ ++++check_readwritecntsp_do_read_nregister_par_masterspi_get_erasefn_from_opcodesfdp_add_uniform_eraserextract_param$X $X@$X9L$X9#P$X$X$X#$X$X$X@&HA&H'H'H'H'H(H(H(H(H(H)H)H)H)H)H)H:H:H:H:Hb?b|? probe_w29ee011erase_chip_28sf040default_spi_write_256default_spi_readprobe_spi_st95spi_write_status_register_flagdefault_spi_write_aaispi_block_erase_c7spi_block_erase_62spi_block_erase_60spi_write_cmdspi_write_extended_address_registerspi_simple_write_cmdprobe_spi_at25fprobe_spi_res2probe_spi_res1probe_spi_remsprobe_spi_rdid_genericspi_sfdp_read_sfdp_chunkregister_opaque_masterv1.2;x4 X-t$8ĞL4`TttğDĠ(<4Ptp$TTD\td$T4TTt$D d$4hD|d<ı`DxԷ$ tXddh$4HtX4,TdD , T $ !8!h!!!!" `" "D"D,#d@#T#h#|#####d#$$8$L$`$4t$T$t$$$$$%$%D(%$\%% %"%$"%4"&D"$&T"8&d"L&t"`&"t&"&"&"&"&"&"&"'$# 'T#@'#`'#'#'$'$'$$'4$'d$($($0($D($X(%l(4%(T%(T'(()T1)d2)$5(*5L*7*9*T:+4;L+T=+D@+tB8,Ct,C,4D,D,Fl-J-4P .Q.Q.R.$R.DR/dR/R,/R@/RT/Rh/S|/$S/DS/dS/S/S/T 0DT,0TL0U0$V04V0DV0TV0dV1tV$1V81W`1TWt1W1W1W14X1TX1tX1X2X2TY(2tY<2YP2Yd2Yx2$Z2Z2d[2\2] 3^H3_p3`3$c 4d84$f4tg5i<5k5k5k5l5qD6Dr\6t6$t6t6Du(7uH7Dvt7tw7w7w7w8dxL8xt8x8y8z8z9t{9{@9$~9~9T:4:t`:t:ā:T:Ć;4;;;4,<x<<<<4D=$=4= >Ĕl>>D0????@Կ@@@HBBB,CCDCt $Dt hD |D D D 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